Ya Peng;Zuozuo Wu;Wei Zhou;Yangjian Li;Jianwei Cao;Shuai Yuan;Deren Yang
{"title":"Effect and Mechanism of SiO2 Polishing Slurry on Chemical Mechanical Polishing Technology in Semiconductor Manufacturing","authors":"Ya Peng;Zuozuo Wu;Wei Zhou;Yangjian Li;Jianwei Cao;Shuai Yuan;Deren Yang","doi":"10.1109/TSM.2026.3702103","DOIUrl":null,"url":null,"abstract":"Chemical mechanical polishing (CMP), as the only route to obtain global planarization at present, is widely used in the manufacturing process of semiconductors. SiO2 polishing slurry finds extensive application in CMP, primarily due to the fact that SiO2 abrasives exhibit moderate hardness and exceptionally outstanding chemical and mechanical properties. Clarifying the effect of SiO2 polishing slurry on semiconductor materials and its underlying mechanism is of great significance for optimizing the polishing process. This study conducts a comprehensive literature review and in-depth analysis to systematically summarize the effects of SiO2 polishing slurry on semiconductor materials during CMP, and deeply reveals the corresponding action mechanisms. Specifically, it focuses on the influences of key components in SiO2 slurry, which including SiO2 abrasives, alkaline pH regulators, oxidants, and other additives, on the CMP performance of semiconductor materials. Through theoretical analysis, the research elaborates on the chemical reactions of each component at the molecular or atomic level and clarifies the micro-mechanisms of interaction between abrasives, chemical components, and semiconductor material surfaces during the polishing process. This review not only establishes a theoretical framework for understanding the relationship between SiO2 polishing slurry and IC semiconductor materials but also provides constructive References for optimizing the polishing process of large-sized silicon wafers.","PeriodicalId":451,"journal":{"name":"IEEE Transactions on Semiconductor Manufacturing","volume":"39 3","pages":"503-514"},"PeriodicalIF":2.5000,"publicationDate":"2026-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Transactions on Semiconductor Manufacturing","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11558566/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/6/11 0:00:00","PubModel":"Epub","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Chemical mechanical polishing (CMP), as the only route to obtain global planarization at present, is widely used in the manufacturing process of semiconductors. SiO2 polishing slurry finds extensive application in CMP, primarily due to the fact that SiO2 abrasives exhibit moderate hardness and exceptionally outstanding chemical and mechanical properties. Clarifying the effect of SiO2 polishing slurry on semiconductor materials and its underlying mechanism is of great significance for optimizing the polishing process. This study conducts a comprehensive literature review and in-depth analysis to systematically summarize the effects of SiO2 polishing slurry on semiconductor materials during CMP, and deeply reveals the corresponding action mechanisms. Specifically, it focuses on the influences of key components in SiO2 slurry, which including SiO2 abrasives, alkaline pH regulators, oxidants, and other additives, on the CMP performance of semiconductor materials. Through theoretical analysis, the research elaborates on the chemical reactions of each component at the molecular or atomic level and clarifies the micro-mechanisms of interaction between abrasives, chemical components, and semiconductor material surfaces during the polishing process. This review not only establishes a theoretical framework for understanding the relationship between SiO2 polishing slurry and IC semiconductor materials but also provides constructive References for optimizing the polishing process of large-sized silicon wafers.
期刊介绍:
The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.