Wafer-Scale Circuit Probing Test for Flexible Ultra-Thin Chips Enabled by Temporary Support

IF 2.5 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Yu Song;Xin Song;Tianbo Wang;Wei Jian;Xiyi Liao;Neng Gao;Ying Chen;Xue Feng
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Abstract

Ultra-thin and flexible chips are essential for high-performance flexible electronic devices, whose large-scale fabrication relies on reliable ultra-thin wafers. Circuit probing test of ultra-thin wafers plays a crucial role in screening functional chips prior to packaging; however, wafer warpage and fragility pose significant challenges to such testing. In this study, the stress distribution in ultra-thin wafers temporarily supported during circuit probing is analyzed based on layered elasticity theory. A wafer failure phase diagram is subsequently established, from which a selection strategy for temporary support materials is proposed to enhance the mechanical resistance of ultra-thin wafers against probing forces. The analysis reveals that higher Young’s modulus and thinner temporary supports enable safer probing. Using the optimized support configuration, successful circuit probing tests are performed on 8-inch, 10- $\upmu $ m-thick self-made dummy wafers and pyroelectric infrared control wafers. No visible cracks are observed on the ultra-thin wafers after the test under a scanning electron microscope. The proposed strategy is expected to pave the way for the large-scale application of ultra-thin and flexible chips.
临时支架支持下柔性超薄芯片的晶圆级电路探测测试
超薄和柔性芯片是高性能柔性电子器件的必要条件,其大规模制造依赖于可靠的超薄晶圆。超薄晶圆的电路探测测试在封装前筛选功能芯片中起着至关重要的作用;然而,晶圆片翘曲和脆性对这种测试构成了重大挑战。基于层状弹性理论,分析了电路探测过程中临时支撑的超薄硅片的应力分布。建立了晶圆失效相图,并据此提出了临时支撑材料的选择策略,以提高超薄晶圆对探测力的机械阻力。分析表明,更高的杨氏模量和更薄的临时支撑可以更安全地探测。利用优化后的支撑结构,对8英寸、10- $\upmu $ m厚度的自制假晶片和热释电红外控制晶片进行了成功的电路探测测试。经扫描电镜观察,超薄晶片表面未见明显裂纹。该战略有望为超薄柔性芯片的大规模应用铺平道路。
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来源期刊
IEEE Transactions on Semiconductor Manufacturing
IEEE Transactions on Semiconductor Manufacturing 工程技术-工程:电子与电气
CiteScore
5.20
自引率
11.10%
发文量
101
审稿时长
3.3 months
期刊介绍: The IEEE Transactions on Semiconductor Manufacturing addresses the challenging problems of manufacturing complex microelectronic components, especially very large scale integrated circuits (VLSI). Manufacturing these products requires precision micropatterning, precise control of materials properties, ultraclean work environments, and complex interactions of chemical, physical, electrical and mechanical processes.
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