Comprehensive Framework for Identifying and Visualizing Key Yield Factors in Semiconductor Manufacturing

Abstract

Semiconductor manufacturing involves complex multistage processes in which product yield is influenced by intricate interactions among machines, materials, recipes, process durations, queue times, and wafer characteristics, such as warpage. Traditional yield analysis methods typically examine these factors in isolation, overlooking their combined effects. To address this limitation, we propose a novel framework based on Transition System (TS) modeling that jointly analyzes high-dimensional process attributes to improve yield understanding and prediction. The framework achieves three goals: 1) quantifying the impact of individual process attributes on yield; 2) identifying interacting attribute combinations that produce best-of-best (BOB) and worst-of-worst (WOW) wafer paths; and 3) visualizing these patterns through an interpretable TS model. We first encode each wafer’s event log as a sequence of discrete state attributes - machine, material, recipe, queue time, duration, and warpage - and then construct a TS model that connects adjacent states. Critical attributes are selected through random forest feature importance, followed by association rule mining to extract yield-relevant state combinations. The final model enables classification of wafers into high- or low-yield categories and provides visual insight into the process behavior. Experiments using real production data from a Korean semiconductor facility demonstrate the effectiveness of the framework in uncovering key yield drivers and supporting data-driven process optimization.