Optimized Process Integration of Photolithography With Dose Compensation for Enhanced Resistance Uniformity of Sputtered TaN Thin Film Resistors

Abstract

This paper discusses the implementation of enhanced process controls derived from design of experiments (DOE) that were performed in the optimization of the device fabrication’s resistor layer (RL) process flow to achieve TaN thin film resistors (TFR) with high resistance uniformity. Fine-tuned stepper recipes with optimized exposure dose compensation ratios significantly minimized the resistance variation attributed to the RL photolithography and reactive sputter deposition processes. Experimental studies demonstrated how critical dimensions (CD) are influenced by the chemical amplification of the photoresist, variations in hot plate processing conditions and lid exhaust, wafer’s thermal history during the post-exposure bake (PEB), and coupling time (CT) between process-sensitive steps. These learnings were used to develop a robust process monitoring scheme with a reduced turnaround time by fourfold for inline electrical characterization of process control monitor (PCM) for TaN-related parameters in addition to automated fault detection and classification (FDC) capabilities. This significantly reduced mean-time-to-detection (MTTD) of process anomalies, tightened statistical process control (SPC), improved process capabilities (Cpk), decreased cycle time for enhanced fab productivity, and achieved record-high RL probe yields and final test yields.