First Analog Linearization of a 300-GHz Power Amplifier: Demonstration and Quantification

Abstract

This work demonstrates the first analog linearization of a 300-GHz solid-state power amplifier module using a single class-C stage as a predistorter to counteract gain and phase compression of the main amplifier. The circuit is implemented in a 35-nm indium gallium arsenide metamorphic high-electron-mobility transistor technology, and the large-signal phase behavior of class-C biased amplifiers is characterized at submillimeter-wave frequencies for the first time. Operating the predistorter at its optimum bias improves the output-referred 1-dB compression point of the main amplifier by 1.3–3 dB across 280–317.5 GHz and shifts the $\text{1} \mathrm{^{\circ }}$ phase-compression point by 2.9 dB at $\text{295} \,\text{GHz}$. Under low-drive conditions, modulated measurements at 295 GHz with 1.35 GHz bandwidth show a 0.9 % error vector magnitude reduction and a 7.2 dB adjacent-channel power ratio improvement. These results set new benchmarks for analog predistortion at millimeter-wave and submillimeter-wave frequencies. Furthermore, methods for quantifying error vector magnitude via complex alignment and orthogonal projection, as well as spectral regrowth, are proposed and experimentally validated.