Impact of Band-to-Band Tunneling in the Charge Trap Layer of NAND Flash Memory

IF 2.9 3区 工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Seongwoo Kim;Beomgeun Lee;Seungjae Baik;Myounggon Kang
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Abstract

This article investigates the impact of band-to-band tunneling (BTBT) occurring in the charge trap layer (CTL) of vertical NAND (V−NAND) flash memory under excessive erasure conditions and aggressive program operation. Strong local electric fields induce BTBT within the CTL, generating electron–hole pairs that cause trap charge loss, inter-cell interference, and early threshold voltage (V ${}_{\mathrm {th}}$ ) reduction. The generated holes accelerate the loss of trapped electrons near the programmed target cell, degrading incremental step pulse programming (ISPP) characteristics, whereas laterally redistributed electrons induce Vth shifts in adjacent cells. In addition, the time-dependent accumulation of BTBT-generated carriers contributes to initial threshold voltage shift (IVS) during retention. These results show that BTBT in the CTL provides reliability issues in V−NAND flash memory, such as short-term Vth instability and inter-cell interference.
带间隧道效应对NAND闪存电荷阱层的影响
本文研究了垂直NAND (V - NAND)快闪存储器在过度擦除条件和侵略性程序操作下电荷阱层(CTL)中发生的带对带隧道效应(tbbt)的影响。强局部电场诱导CTL内的BTBT,产生电子空穴对,导致陷阱电荷损失,细胞间干扰和早期阈值电压(V ${}_{\ mathm {th}}$)降低。产生的空穴加速了编程目标单元附近捕获电子的损失,降低了增量步进脉冲编程(ISPP)特性,而横向重新分布的电子会引起相邻单元的Vth位移。此外,btbt产生的载流子的时间依赖性积累有助于在保留期间初始阈值电压漂移(IVS)。这些结果表明,CTL中的bt在V - NAND闪存中存在可靠性问题,如短期Vth不稳定性和细胞间干扰。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Journal of the Electron Devices Society
IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology
CiteScore
5.20
自引率
4.30%
发文量
124
审稿时长
9 weeks
期刊介绍: The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.
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