{"title":"A 550-μW Capacitor-Assisted Transformer-Based VCO Achieving 204-dBc/Hz FoMA at 1-MHz Frequency Offset","authors":"Teng-Shen Yang;Liang-Hung Lu","doi":"10.1109/LSSC.2026.3690818","DOIUrl":null,"url":null,"abstract":"This letter presents a capacitor-assisted transformer (CTF)-based voltage-controlled oscillator (VCO) that achieves a low flicker-noise corner with submilliwatt power consumption and compact chip area. By introducing a small assisting capacitor into the transformer, the higher order tank impedance is reshaped from the second-resonance region toward the third-resonance region, resulting in a more symmetric effective impulse sensitivity function (ISF) and hence reduced flicker-noise upconversion without incurring extra area overhead. Fabricated in a 90-nm CMOS process, the proposed VCO operates from 6.5 to 7.63 GHz while consuming 0.55 mW. Measurements show a minimum flicker-noise corner of 270 kHz and a phase noise of −131.3 dBc/Hz at 10-MHz offset. The core occupies 0.025 mm2, achieving a peak area-normalized figure of merit (FoM<inline-formula> <tex-math>${}_{A}$ </tex-math></inline-formula>) of 204.3 dBc/Hz at 1-MHz offset.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"9 ","pages":"150-153"},"PeriodicalIF":2.0000,"publicationDate":"2026-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11510283/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2026/3/6 0:00:00","PubModel":"Epub","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
This letter presents a capacitor-assisted transformer (CTF)-based voltage-controlled oscillator (VCO) that achieves a low flicker-noise corner with submilliwatt power consumption and compact chip area. By introducing a small assisting capacitor into the transformer, the higher order tank impedance is reshaped from the second-resonance region toward the third-resonance region, resulting in a more symmetric effective impulse sensitivity function (ISF) and hence reduced flicker-noise upconversion without incurring extra area overhead. Fabricated in a 90-nm CMOS process, the proposed VCO operates from 6.5 to 7.63 GHz while consuming 0.55 mW. Measurements show a minimum flicker-noise corner of 270 kHz and a phase noise of −131.3 dBc/Hz at 10-MHz offset. The core occupies 0.025 mm2, achieving a peak area-normalized figure of merit (FoM${}_{A}$ ) of 204.3 dBc/Hz at 1-MHz offset.