A Novel VGSOT-pMTJ Write Circuit for Hybrid CMOS/MTJ CIM Architecture

Abstract

Hybrid computation-in-memory (CIM) architecture has emerged as the most promising alternative to overcome the drawbacks of the conventional CMOS-only devices used in the conventional von-Neumann architecture. In the hybrid CIM architecture, a pair of perpendicular magnetic tunnel junctions (pMTJs) is used to store one bit of information. Though there are different methods by which one can store information in the pMTJ pair, the voltage gate spin–orbit torque (VGSOT) is the most prominent due to its advantages over the rest. In this work, a novel write circuit has been proposed that stores information into the pMTJ pair using the VGSOT mechanism. The proposed circuit was implemented and evaluated using the Cadence Virtuoso tool. Comparison of the novel write circuit with the existing one reveals a significant improvement of 77.56% in energy efficiency, 87.01% reduction in delay, 97.09% in energy delay product (EDP), and a 50% decrease in transistor count. Monte Carlo simulations further show that the proposed write circuit achieves lower energy consumption in its worst case than the best-case energy consumption of the existing design, highlighting its robustness and energy efficiency.