Impact of Power Loss in the Substrate on the Efficiency of RF GaN-on-Si HEMTs

Abstract

In RF GaN-on-Si technology, the semiconducting Si substrate can couple to the overlying circuitry and cause substrate loss, which is known to degrade the performance of passive structures. An impact on active devices also exists. This paper presents the first experimental correlation between insertion loss measured on coplanar waveguide (CPW) lines and a degradation in the power added efficiency (PAE) of GaN-on-Si HEMTs. To quantify the PAE penalty suffered by using a lossy substrate, we propose a simple simulation procedure which accounts for the presence of a parasitic surface conductance (PSC) layer at the surface of the high resistivity Si. The simulated substrate, which can accurately reproduce the CPW line measurements of different wafers, is then used to generate an aggregated substrate resistance. A simple model of the power amplifier (PA) allows to estimate the PAE drop caused by power dissipation in the substrate. The simulated substrate impact, which can be as high as 15 PAE percentage points at 28 GHz, matches the experimentally observed difference between HEMTs fabricated on different substrates. Furthermore, the physics-based simulation enables analysis of operating frequency and dopant diffusion effects in Si. Finally, a specification on substrate effective resistivity for a negligible substrate impact on the PA is given.