Applying hypervisor-based fault tolerance techniques to safety-critical embedded systems

IF 2.6 4区计算机科学 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

Microprocessors and Microsystems Pub Date : 2026-03-01 Epub Date: 2026-02-14 DOI:10.1016/j.micpro.2026.105255

Santiago Lozano , Javier Fernandez , Jesus Carretero

引用次数: 0

Abstract

The main objective of this work is the design and implementation of a space use case for applying the Hypervisor-Based Fault Tolerance (HBFT) mechanisms to redundant software applications in independent virtual machines, isolated from each other, and to research the effect of the HBFT mechanism on system safety and reliability. To test the developed fault tolerance mechanism, we decided to use a real use case of space systems: the ESA Near InfraRed (NIR) HAWAII 2-RG Data Processing Algorithms benchmarking software. After testing with an exhaustive fault injection campaign, the evaluation results show that our HBFT for critical real-time embedded systems is able to detect and cover all failures detected for critical real-time tasks, recovering failed virtual machines or containers from degradation to become fully operational again.

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将基于管理程序的容错技术应用于安全关键型嵌入式系统

本工作的主要目标是设计和实现一个空间用例，用于将基于管理程序的容错（HBFT）机制应用于相互隔离的独立虚拟机中的冗余软件应用程序，并研究HBFT机制对系统安全性和可靠性的影响。为了测试开发的容错机制，我们决定使用空间系统的真实用例：ESA近红外（NIR）夏威夷2-RG数据处理算法基准测试软件。经过详尽的故障注入测试，评估结果表明，我们针对关键实时嵌入式系统的HBFT能够检测并覆盖所有针对关键实时任务检测到的故障，从降级中恢复故障的虚拟机或容器，使其再次完全运行。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Microprocessors and Microsystems 工程技术-工程：电子与电气

CiteScore

6.90

自引率

3.80%

发文量

204

审稿时长

172 days

期刊介绍： Microprocessors and Microsystems: Embedded Hardware Design (MICPRO) is a journal covering all design and architectural aspects related to embedded systems hardware. This includes different embedded system hardware platforms ranging from custom hardware via reconfigurable systems and application specific processors to general purpose embedded processors. Special emphasis is put on novel complex embedded architectures, such as systems on chip (SoC), systems on a programmable/reconfigurable chip (SoPC) and multi-processor systems on a chip (MPSoC), as well as, their memory and communication methods and structures, such as network-on-chip (NoC). Design automation of such systems including methodologies, techniques, flows and tools for their design, as well as, novel designs of hardware components fall within the scope of this journal. Novel cyber-physical applications that use embedded systems are also central in this journal. While software is not in the main focus of this journal, methods of hardware/software co-design, as well as, application restructuring and mapping to embedded hardware platforms, that consider interplay between software and hardware components with emphasis on hardware, are also in the journal scope.