So-Yeon Kwon, Woon-San Ko, Jun-Ho Byun, Do-Yeon Lee, So-Yeong Park, Hye-Ri Hong, Ga-Won Lee
{"title":"A 10T2R non-volatile SRAM cell design with high-reliability","authors":"So-Yeon Kwon, Woon-San Ko, Jun-Ho Byun, Do-Yeon Lee, So-Yeong Park, Hye-Ri Hong, Ga-Won Lee","doi":"10.1016/j.sse.2025.109304","DOIUrl":null,"url":null,"abstract":"<div><div>In this study, a highly reliable 10T2R non-volatile SRAM (nvSRAM) cell is proposed. The previous nvSRAM structures face reliability issues of Resistive Random-Access Memory (RRAM) due to unwanted stress-induced data nodes. To overcome this challenge, the proposed 10T2R nvSRAM design integrates two transistors that effectively isolate both ends of the RRAM, acting as voltage blockers and current controllers. The SPICE simulation results show that the voltage stress applied to the RRAM during the Read/Write operation is less than 1 mV. Regarding the static noise margin (SNM), the SNM value of the 10T2R in each operation is similar to that of a 6T SRAM. Additionally, it successfully performs the RESTORE operation after power-on and demonstrates low power consumption. This highlights the potential of the proposed 10T2R cell to advance non-volatile memory technology.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"233 ","pages":"Article 109304"},"PeriodicalIF":1.4000,"publicationDate":"2026-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110125002497","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2025/12/5 0:00:00","PubModel":"Epub","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
In this study, a highly reliable 10T2R non-volatile SRAM (nvSRAM) cell is proposed. The previous nvSRAM structures face reliability issues of Resistive Random-Access Memory (RRAM) due to unwanted stress-induced data nodes. To overcome this challenge, the proposed 10T2R nvSRAM design integrates two transistors that effectively isolate both ends of the RRAM, acting as voltage blockers and current controllers. The SPICE simulation results show that the voltage stress applied to the RRAM during the Read/Write operation is less than 1 mV. Regarding the static noise margin (SNM), the SNM value of the 10T2R in each operation is similar to that of a 6T SRAM. Additionally, it successfully performs the RESTORE operation after power-on and demonstrates low power consumption. This highlights the potential of the proposed 10T2R cell to advance non-volatile memory technology.
期刊介绍:
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.