A 37.8 Mb/mm² SRAM in Intel 18A Technology Featuring a Resistive Supply-Line Write Scheme and Write-Assist With Parallel Boost Injection

Abstract

A high-density (HD), SRAM-based register file (RF) has been demonstrated in Intel 18A Technology (Wang et al., 2025 and Pilo et al., 2025) featuring RibbonFET GAA transistors and a back side power delivery network (BSDPN). The RF is optimized for HD and array efficiency and achieves a density of 37.8 Mb/mm2, the highest density reported to date for an RF in the most advanced technology nodes (Wang et al., 2025, Chang et al., 2025, and Pilo et al., 2025). It is implemented with a conventional bitline (BL), two-bank memory architecture and it can be used as the SRAM workhorse for most SoC applications with maximum bit-count of 262Kb.