{"title":"An interface trap density evaluation method for SiC MOSFET based on neural network","authors":"Borui Yang , Guicui Fu , Bo Wan , Xiangfen Wang","doi":"10.1016/j.microrel.2025.115934","DOIUrl":null,"url":null,"abstract":"<div><div>The high density of interface defects at the gate oxide interface is closely related to the device characteristics and reliability of silicon carbide metal-oxide-semiconductor field effect transistors. However, an efficient and reliable characterization method for interface defects remains to be developed. In this work, we propose a neural network method for evaluating the interface trap density distribution and fixed oxide charge density using the transfer characteristics of devices. The neural network utilizes a long short-term memory structure to capture the mapping relationship between the transfer characteristic and the interface defect parameters. The numerical simulation data are used to form the training dataset of the network, and an effective preprocessing method is also presented. The proposed method was successfully verified by comparing simulated transfer characteristics using the evaluated results of commercial devices with corresponding measurements. Also, the interface defect parameters were evaluated by the subthreshold current method for comparison. The result shows that the evaluated results of the proposed method are close to the experimental evaluated results, with relative errors of 3.3 %, 6.6 %, and 28.2 % for the three devices under threshold voltage, respectively. Further, the proposed method was successfully applied during the high temperature gate bias tests to detect the degradation trend of the gate oxide interface. The result reflects its practicality for the interface reliability analysis of silicon carbide metal-oxide-semiconductor field effect transistors.</div></div>","PeriodicalId":51131,"journal":{"name":"Microelectronics Reliability","volume":"175 ","pages":"Article 115934"},"PeriodicalIF":1.9000,"publicationDate":"2025-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Microelectronics Reliability","FirstCategoryId":"5","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0026271425003476","RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"2025/10/14 0:00:00","PubModel":"Epub","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
The high density of interface defects at the gate oxide interface is closely related to the device characteristics and reliability of silicon carbide metal-oxide-semiconductor field effect transistors. However, an efficient and reliable characterization method for interface defects remains to be developed. In this work, we propose a neural network method for evaluating the interface trap density distribution and fixed oxide charge density using the transfer characteristics of devices. The neural network utilizes a long short-term memory structure to capture the mapping relationship between the transfer characteristic and the interface defect parameters. The numerical simulation data are used to form the training dataset of the network, and an effective preprocessing method is also presented. The proposed method was successfully verified by comparing simulated transfer characteristics using the evaluated results of commercial devices with corresponding measurements. Also, the interface defect parameters were evaluated by the subthreshold current method for comparison. The result shows that the evaluated results of the proposed method are close to the experimental evaluated results, with relative errors of 3.3 %, 6.6 %, and 28.2 % for the three devices under threshold voltage, respectively. Further, the proposed method was successfully applied during the high temperature gate bias tests to detect the degradation trend of the gate oxide interface. The result reflects its practicality for the interface reliability analysis of silicon carbide metal-oxide-semiconductor field effect transistors.
期刊介绍:
Microelectronics Reliability, is dedicated to disseminating the latest research results and related information on the reliability of microelectronic devices, circuits and systems, from materials, process and manufacturing, to design, testing and operation. The coverage of the journal includes the following topics: measurement, understanding and analysis; evaluation and prediction; modelling and simulation; methodologies and mitigation. Papers which combine reliability with other important areas of microelectronics engineering, such as design, fabrication, integration, testing, and field operation will also be welcome, and practical papers reporting case studies in the field and specific application domains are particularly encouraged.
Most accepted papers will be published as Research Papers, describing significant advances and completed work. Papers reviewing important developing topics of general interest may be accepted for publication as Review Papers. Urgent communications of a more preliminary nature and short reports on completed practical work of current interest may be considered for publication as Research Notes. All contributions are subject to peer review by leading experts in the field.