A 40.68-MHz, 200-ns-Settling Active Rectifier for mm-Sized Implants

IF 2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Ronald Wijermars;Yi-Han Ou-Yang;Sijun Du;Dante G. Muratore
{"title":"A 40.68-MHz, 200-ns-Settling Active Rectifier for mm-Sized Implants","authors":"Ronald Wijermars;Yi-Han Ou-Yang;Sijun Du;Dante G. Muratore","doi":"10.1109/LSSC.2025.3611484","DOIUrl":null,"url":null,"abstract":"This letter describes a fast-settling active rectifier for a 40.68 MHz wireless power transfer receiver for implantable applications. Fast-settling and low power are achieved through a novel direct voltage-domain compensation technique. The rectifier maintains high efficiency during load and link variations required for downlink communication. The system was fabricated in 40nm CMOS and achieves a voltage conversion ratio of 93.9% and a simulated power conversion efficiency of 90.1% in a 0.19 mm2 area, resulting in a 118 mW/mm2 power density while integrating the resonance and filter capacitors. The worst-case settling of the ON- and OFF-delay compensation in the active rectifier is 200 ns, which is the fastest reported to date.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"8 ","pages":"305-308"},"PeriodicalIF":2.0000,"publicationDate":"2025-09-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11172323/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

Abstract

This letter describes a fast-settling active rectifier for a 40.68 MHz wireless power transfer receiver for implantable applications. Fast-settling and low power are achieved through a novel direct voltage-domain compensation technique. The rectifier maintains high efficiency during load and link variations required for downlink communication. The system was fabricated in 40nm CMOS and achieves a voltage conversion ratio of 93.9% and a simulated power conversion efficiency of 90.1% in a 0.19 mm2 area, resulting in a 118 mW/mm2 power density while integrating the resonance and filter capacitors. The worst-case settling of the ON- and OFF-delay compensation in the active rectifier is 200 ns, which is the fastest reported to date.
一个40.68 mhz, 200-ns沉降有源整流器毫米大小的植入物
这封信描述了用于可植入应用的40.68 MHz无线电力传输接收器的快速沉降有源整流器。通过一种新颖的直接电压域补偿技术,实现了快速沉降和低功耗。整流器在下行通信所需的负载和链路变化期间保持高效率。该系统采用40nm CMOS工艺,在0.19 mm2面积内实现了93.9%的电压转换比和90.1%的模拟功率转换效率,在集成谐振和滤波电容的情况下,功率密度为118 mW/mm2。有源整流器ON- off延时补偿的最坏情况沉降速度为200ns,是迄今为止报道的最快的。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信