Quantification of interfacial trap states via bias-applied HAXPES: a chemical-state perspective

Abstract

An interface where two solid materials meet often disrupts bulk continuity, especially in electronic structures. When an external bias is applied, the interfacial electronic structure forms a voltage barrier that inhibits charge transfer and promotes charge accumulation—a key mechanism in semiconductor devices. However, our understanding of such interfaces remains limited at the molecular scale. Here, we quantitatively characterize interfacial trap states in a model Si|SiO₂|Au MOS structure using bias-applied hard X-ray photoelectron spectroscopy (BA-HAXPES), resolving oxidation state variations across the dielectric layer under real-time bias. While conventional interpretations rely on peak shifts to describe charging effects, our results demonstrate that these shifts are also sensitive to dielectric thickness and local potential variations; thus, we propose a modified Grahame-based framework to contextualize the influence of interfacial potential on chemical-state changes and to support the use of peak intensity as a more reliable indicator. Furthermore, bias-dependent analysis reveals distinct charge dynamics for different oxidation states: Si³⁺ exhibits potential-driven delocalization behavior, resembling mobile carriers within the dielectric, whereas Si²⁺ remains strongly confined to the SiO₂|Au interface, acting as a localized trap signature. These trends are consistently observed across the full bias range and provide a more direct connection between chemical state evolution and interfacial trap-state activity. Our findings offer molecular-level insight into charge accumulation mechanisms and support future trap-state engineering in nanoscale electronic devices.