Fabrication of high-Ge-content silicon-Germanium film on SiO2/Silicon (111) patterned substrate by epitaxial lateral overgrowth

IF 4.6 3区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

Materials Science in Semiconductor Processing Pub Date : 2025-09-18 DOI:10.1016/j.mssp.2025.110077

Ching-Hsueh Chiu , Wu-Yih Uen , Ting-Chuan Li , Ching-Yi Liu , Chiashain Chuang , Ji-Lin Shen , Dung-Sheng Tsai , Lung-Hsing Hsu , Hao-Chung Kuo

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引用次数: 0

Abstract

In this study, we achieved a high-Ge-content SiGe-on-Si heteropitaxial structure by utilizing the patterned SiO₂/Si(111) substrate (PS) with micron-level line window array in the SiO₂ masking film and conducting the selective growth by liquid phase epitaxy (LPE). The anisotropic growth rate of LPE initially facilitated the epitaxial lateral overgrowth (ELO) of a low-Ge-content (20–25 %) SiGe buffer layer on PS. Subsequently, the heteroepitaxial growth of high-Ge-content (>95 %) SiGe progressed vertically through a composition self-modulation process.

Atomic force microscope (AFM) analysis results demonstrated that the use of PS enables the surface roughness of high-Ge-content layer to decrease to as low as 2.1 nm, more than an order of magnitude better than grown directly on Si substrate. High content of Ge and the surface stress distribution in SiGe epitaxial layer were recognized by a Raman spectrometer. Furthermore, the conversion of elemental content from Si-rich to Ge-rich, and ultimately to a high-Ge-content (>95 %) state was distinctly illustrated by the cross-sectional energy dispersive X-ray spectroscopy (EDS). Besides, high-resolution X-ray diffraction (HR-XRD) analysis and room-temperature photoluminescence (PL) measurements were also conducted to confirm the sample quality. Finally, transmission electron microscopy (TEM) analysis indicated that the planar defects (microtwins/stacking faults) that frequently appear when the heteroepitaxial growth is performed directly on Si(111) face seem to be completely suppressed when it is performed on PS. Our film characterizations demonstrated that using PS to perform ELO by LPE can effectively limit the formation and propagation of threading dislocations caused by the lattice mismatch. Both the surface morphology and crystalline quality have thus been definitely improved for the heteroepitaxial layer prepared. Therefore, the present work might provide an effective method for preparing high-quality Ge-on-Si epitaxial structures and opened up a potential application path for advanced semiconductors.

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外延横向过生长法在SiO2/Silicon（111）图像化衬底上制备高锗含量硅锗薄膜

在本研究中，我们利用具有微米级线窗阵列的图图化SiO2/Si（111）衬底（PS）在SiO2掩蔽膜中，通过液相外延（LPE）进行选择性生长，实现了高锗含量的Si -on-Si异质外延结构。LPE的各向异性生长速率最初促进了低锗含量（20 - 25%）SiGe缓冲层在PS上的外延横向过度生长（ELO），随后，高锗含量（> 95%） SiGe的异外延生长通过成分自调制过程垂直进行。原子力显微镜（AFM）分析结果表明，使用PS可以使高锗含量层的表面粗糙度降低到2.1 nm，比直接在Si衬底上生长好一个数量级以上。用拉曼光谱仪分析了锗的高含量和锗外延层的表面应力分布。此外，横断面能量色散x射线能谱（EDS）清楚地说明了元素含量从富si到富ge，最终到高ge含量（> 95%）状态的转变。此外，还进行了高分辨率x射线衍射（HR-XRD）分析和室温光致发光（PL）测量，以确定样品的质量。最后，透射电镜（TEM）分析表明，直接在Si（111）表面进行异质外延生长时经常出现的平面缺陷（微孪晶/层错）在PS上进行时似乎完全被抑制。我们的薄膜表征表明，使用PS通过LPE进行ELO可以有效地限制由晶格错配引起的螺纹位错的形成和传播。因此制备的异质外延层的表面形貌和晶体质量都得到了明显的改善。因此，本研究可能为制备高质量的锗硅外延结构提供一种有效的方法，并为先进半导体开辟了一条潜在的应用路径。

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来源期刊

Materials Science in Semiconductor Processing 工程技术-材料科学：综合

CiteScore

8.00

自引率

4.90%

发文量

780

审稿时长

42 days

期刊介绍： Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy. Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications. Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.