Towards a Unified Framework for Modeling and Analyzing User-Defined Online Non-Preemptive Scheduling Policies

IF 3.8 2区计算机科学 Q2 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Transactions on Computers Pub Date : 2025-07-10 DOI:10.1109/TC.2025.3587514

Pourya Gohari;Jeroen Voeten;Mitra Nasri

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引用次数: 0

Abstract

This paper presents a unified formal framework, called ReTA, that allows users to define scheduling problems using a user-friendly domain-specific language (DSL) and automatically obtain response times of jobs in return. ReTA supports user-defined online scheduling policies (beyond work-conserving or priority-based scheduling) for heterogeneous computing resource types with multiple instances per type (e.g., multiple CPU cores, GPUs, DSPs, and FPGAs on one single chip), thus supporting global, partitioned, and clustered scheduling. In the current version of ReTA, we focus on non-preemptive periodic tasks as these are susceptible to scheduling anomalies and hence harder to analyze. ReTA performs response-time analysis by constructing a timed labeled transition system (TLTS) from the domain model as a basis for performing a reachability analysis enriched with efficient state-space reduction techniques. Our empirical evaluations show that ReTA identifies up to 50 times more schedulable task sets than fixed-point iteration-based analyses. With a runtime on the order of a few minutes, ReTA produces highly accurate results two-orders of magnitude faster than an exact Timed Automata-based analysis in UPPAAL (e.g., for systems with 16 cores and 32 tasks).

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基于统一框架的自定义在线非抢占调度策略建模与分析

本文提出了一个统一的形式化框架，称为ReTA，它允许用户使用用户友好的领域特定语言（DSL）定义调度问题，并自动获得作业的响应时间作为回报。ReTA支持用户自定义在线调度策略（不局限于工作节约或基于优先级的调度），用于异构计算资源类型（如单个芯片上的多个CPU内核、gpu、dsp和fpga），从而支持全局调度、分区调度和集群调度。在当前版本的ReTA中，我们专注于非抢占式周期性任务，因为这些任务容易受到调度异常的影响，因此难以分析。ReTA通过从域模型构建一个时间标记转换系统（TLTS）来执行响应时间分析，该系统作为执行可达性分析的基础，丰富了有效的状态空间缩减技术。我们的经验评估表明，ReTA识别的可调度任务集比基于定点迭代的分析多50倍。在几分钟的运行时间内，ReTA产生高度精确的结果，比UPPAAL中基于定时自动机的精确分析快两个数量级（例如，对于具有16核和32个任务的系统）。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Transactions on Computers 工程技术-工程：电子与电气

CiteScore

6.60

自引率

5.40%

发文量

199

审稿时长

6.0 months

期刊介绍： The IEEE Transactions on Computers is a monthly publication with a wide distribution to researchers, developers, technical managers, and educators in the computer field. It publishes papers on research in areas of current interest to the readers. These areas include, but are not limited to, the following: a) computer organizations and architectures; b) operating systems, software systems, and communication protocols; c) real-time systems and embedded systems; d) digital devices, computer components, and interconnection networks; e) specification, design, prototyping, and testing methods and tools; f) performance, fault tolerance, reliability, security, and testability; g) case studies and experimental and theoretical evaluations; and h) new and important applications and trends.