Degradation Analysis of 14 nm SOI FinFETs by Influence of Hot Carrier Injection and Self-Heating Synergistic Effects

IF 2.3 3区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Zhaohui Qin;Lei Dong;Lan Chen;Renjie Lu;Rong Chen;Yali Wang
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Abstract

With device dimensions shrink, traditional plane-field effect transistors no longer meet the demands of the development. As a novel type of three-dimensional device, 14 nm SOI FinFETs has been widely research attention and application due to the superior performance. However, Hot Carrier Injection (HCI) at different temperatures and its synergistic effect with Self-Heating Effect (SHE) synergistic effects have serious effects on the reliability of 14 nm SOI FinFETs and need to be solved. Therefore, this work uses Technology Computer-Aided Design to explore the electrical performance degradation of the 14 nm SOI FinFETs to reveal the damage mechanism. Simulation results demonstrate the threshold voltage shift and electron mobility decrease of the device. The increase in ambient temperature and the rise in lattice temperature induced by SHE will exacerbate the HCI effect, resulting in more hot charge carriers being injected into the gate oxide layer. Based on results, achieving more efficient thermal management by enhancing the heat dissipation performance of the drain and its extended regions can provide important theoretical support for reliability design.
热载流子注入和自热协同效应影响下14nm SOI finfet的降解分析
随着器件尺寸的不断缩小,传统的平面场效应晶体管已不能满足发展的要求。14nm SOI finfet作为一种新型的三维器件,由于其优越的性能得到了广泛的研究和应用。然而,不同温度下的热载流子注入(HCI)及其与自热效应(SHE)的协同效应严重影响了14nm SOI finfet的可靠性,需要解决。因此,本研究利用计算机辅助设计技术来探讨14nm SOI finfet的电性能退化,以揭示其损伤机制。仿真结果表明,该器件的阈值电压偏移和电子迁移率降低。环境温度的升高和SHE引起的晶格温度的升高会加剧HCI效应,导致更多的热荷载流子被注入栅极氧化层。研究结果表明,通过提高排水孔及其延伸区域的散热性能来实现更高效的热管理,可以为可靠性设计提供重要的理论支持。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Transactions on Device and Materials Reliability
IEEE Transactions on Device and Materials Reliability 工程技术-工程:电子与电气
CiteScore
4.80
自引率
5.00%
发文量
71
审稿时长
6-12 weeks
期刊介绍: The scope of the publication includes, but is not limited to Reliability of: Devices, Materials, Processes, Interfaces, Integrated Microsystems (including MEMS & Sensors), Transistors, Technology (CMOS, BiCMOS, etc.), Integrated Circuits (IC, SSI, MSI, LSI, ULSI, ELSI, etc.), Thin Film Transistor Applications. The measurement and understanding of the reliability of such entities at each phase, from the concept stage through research and development and into manufacturing scale-up, provides the overall database on the reliability of the devices, materials, processes, package and other necessities for the successful introduction of a product to market. This reliability database is the foundation for a quality product, which meets customer expectation. A product so developed has high reliability. High quality will be achieved because product weaknesses will have been found (root cause analysis) and designed out of the final product. This process of ever increasing reliability and quality will result in a superior product. In the end, reliability and quality are not one thing; but in a sense everything, which can be or has to be done to guarantee that the product successfully performs in the field under customer conditions. Our goal is to capture these advances. An additional objective is to focus cross fertilized communication in the state of the art of reliability of electronic materials and devices and provide fundamental understanding of basic phenomena that affect reliability. In addition, the publication is a forum for interdisciplinary studies on reliability. An overall goal is to provide leading edge/state of the art information, which is critically relevant to the creation of reliable products.
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