{"title":"Efficient LDMOS Design via Transferable Surrogate Models and Multi-Objective Optimization","authors":"Hongyu Tang;Chenggang Xu;Xiaoyun Huang;Yuxuan Zhu;Yunlong Li;Dawei Gao;Yitao Ma;Kai Xu","doi":"10.1109/LED.2025.3586707","DOIUrl":null,"url":null,"abstract":"Optimizing LDMOS performance requires balancing breakdown voltage (BV) and specific on-resistance (<inline-formula> <tex-math>$\\text {R}_{\\text {on},\\text {sp}}$ </tex-math></inline-formula>) under silicon-limit constraints. Conventional technology computer-aided design (TCAD)-based device design is time-consuming and inefficient for large parameter spaces. This work presents a machine learning (ML)-assisted framework that combines initial and fine-tuned deep neural network (DNN) surrogate models with multi-objective particle swarm optimization (MOPSO). The fine-tuned DNN adapts to a non-overlapping extended design space using only a small dataset, while the two surrogates are selectively applied during MOPSO to evaluate candidate designs, enabling significantly faster design evaluation compared to TCAD. SHAP analysis reveals consistent feature importance that aligns with the underlying device physics. The framework constructs diverse Pareto-optimal fronts, offering a scalable solution for automated LDMOS optimization under complex performance trade-offs.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 9","pages":"1593-1596"},"PeriodicalIF":4.5000,"publicationDate":"2025-07-07","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/11072478/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Optimizing LDMOS performance requires balancing breakdown voltage (BV) and specific on-resistance ($\text {R}_{\text {on},\text {sp}}$ ) under silicon-limit constraints. Conventional technology computer-aided design (TCAD)-based device design is time-consuming and inefficient for large parameter spaces. This work presents a machine learning (ML)-assisted framework that combines initial and fine-tuned deep neural network (DNN) surrogate models with multi-objective particle swarm optimization (MOPSO). The fine-tuned DNN adapts to a non-overlapping extended design space using only a small dataset, while the two surrogates are selectively applied during MOPSO to evaluate candidate designs, enabling significantly faster design evaluation compared to TCAD. SHAP analysis reveals consistent feature importance that aligns with the underlying device physics. The framework constructs diverse Pareto-optimal fronts, offering a scalable solution for automated LDMOS optimization under complex performance trade-offs.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.