Novel Quasi-Unipolar MOS Pinch-Off Device With Zero-Biased BJT and Its Experiments

IF 4.5 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Teng Liu;Wentong Zhang;Qiyi Wu;Guoliang Yao;Lihui Gu;Nailong He;Sen Zhang;Shixiong Chong;Yuheng Yao;Yongyu Shi;Ming Qiao;Zhaoji Li;Bo Zhang
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引用次数: 0

Abstract

A novel quasi-unipolar MOS pinch-off device (MPD) is proposed and experimentally demonstrated in this letter. The MPD integrates a collector-junction zero-biased bipolar junction transistor (z-BJT) and a MOS pinch-off structure. The MOS pinch-off mechanism alleviates the inherent trade-off in conventional JFET where the necessity to sacrifice current capability to reduce the pinch-off voltage ${V}_{\text {off}}$ , and a 70% increase in current at the same ${V}_{\text {off}}$ is facilitated. The z-BJT eliminates hole injection into the P-sub, enabling the MPD to operate in a unipolar mode except for the base region of the BJT. This quasi-unipolar mode leads to a reduced P-sub leakage current by more than 3 orders of magnitude compared to that of conventional high-voltage diode. The MPD has been fabricated on a high voltage Bipolar-CMOS-DMOS (BCD) process platform. Experiments demonstrated that the MPD exhibits a breakdown voltage ${V}_{\text {B}}$ of 832 V, a ${V}_{\text {off}}$ of 20 V, an on-state current exceeding 40 mA, and an off-state substrate leakage current of less than 10 nA. This device has successfully entered large-scale mass production.
新型零偏BJT准单极MOS掐断器件及其实验
本文提出了一种新型的准单极MOS掐断器件(MPD),并进行了实验验证。MPD集成了一个集电极结零偏双极结晶体管(z-BJT)和一个MOS掐断结构。MOS掐断机制缓解了传统JFET固有的权衡,传统JFET必须牺牲电流能力来降低掐断电压${V}_{\text {off}}$,并且在相同的${V}_{\text {off}}$下,电流增加70%。z-BJT消除了P-sub的注孔,使得MPD除了BJT的基础区域外,可以在单极模式下工作。与传统高压二极管相比,这种准单极模式导致P-sub泄漏电流降低了3个数量级以上。在高压双极cmos - dmos (BCD)工艺平台上制备了MPD。实验表明,MPD的击穿电压${V}_{\text {B}}$为832 V,电压${V}_{\text {off}}$为20 V,导通电流超过40 mA,导通衬底漏电流小于10 nA。该装置已成功进入大规模量产。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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