{"title":"A 160-Gb/s D-Band Bi-Directional CMOS Mixer Covering 112–170 GHz for 6G Transceivers","authors":"Chenxin Liu;Yudai Yamazaki;Anyi Tian;Chun Wang;Hans Herdian;Abanob Shehata;Han Nie;Minzhe Tang;Hiroyuki Sakai;Kazuaki Kunihiro;Atsushi Shirane;Kenichi Okada","doi":"10.1109/LSSC.2025.3597690","DOIUrl":null,"url":null,"abstract":"This work presents a D-band bi-directional CMOS double-balanced mixer (DBM) supporting data rates over 160 Gb/s with a 58-GHz RF bandwidth (112–170 GHz). The mixer employs four identical NMOS passive switches (<inline-formula> <tex-math>$12~\\mu $ </tex-math></inline-formula>m/60 nm) in a DBM topology, providing the isolation between RF, LO, and IF ports. Both IF and RF are bi-directional, enabling up conversion and down conversion. The proposed mixer is fabricated in a 65-nm CMOS process with an integrated LO-driver amplifier. LO amplifier has a 9.5-dB simulated gain and an 8-dBm saturated output power. The total area, including RF and DC pads is 0.7749 mm2. The measurement result shows a −12.5-dB conversion gain in both directions with differential signals and a 3-dB extra loss in a single-ended configuration. <inline-formula> <tex-math>$\\mathrm { OP_{1dB}}$ </tex-math></inline-formula> is −13.5 dBm for up conversion and −5.5 dBm for down conversion. In modulated signal measurements, the mixer handles a 40-GHz bandwidth OFDM 16-QAM signal centered at 135 GHz, demonstrating a 160-Gb/s data rate in both up conversion and down conversion.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"8 ","pages":"241-244"},"PeriodicalIF":2.0000,"publicationDate":"2025-08-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11122552/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
This work presents a D-band bi-directional CMOS double-balanced mixer (DBM) supporting data rates over 160 Gb/s with a 58-GHz RF bandwidth (112–170 GHz). The mixer employs four identical NMOS passive switches ($12~\mu $ m/60 nm) in a DBM topology, providing the isolation between RF, LO, and IF ports. Both IF and RF are bi-directional, enabling up conversion and down conversion. The proposed mixer is fabricated in a 65-nm CMOS process with an integrated LO-driver amplifier. LO amplifier has a 9.5-dB simulated gain and an 8-dBm saturated output power. The total area, including RF and DC pads is 0.7749 mm2. The measurement result shows a −12.5-dB conversion gain in both directions with differential signals and a 3-dB extra loss in a single-ended configuration. $\mathrm { OP_{1dB}}$ is −13.5 dBm for up conversion and −5.5 dBm for down conversion. In modulated signal measurements, the mixer handles a 40-GHz bandwidth OFDM 16-QAM signal centered at 135 GHz, demonstrating a 160-Gb/s data rate in both up conversion and down conversion.