Indium Alloying as a Mobility Booster in IGZO Thin‐Film‐Transistor via Plasma‐Enhanced Atomic Layer Deposition Approach for BEOL Compatible Circuits

IF 5.3 2区材料科学 Q2 MATERIALS SCIENCE, MULTIDISCIPLINARY

Advanced Electronic Materials Pub Date : 2025-08-22 DOI:10.1002/aelm.202500162

Meishan Zhang, Mei Shen, Wenhui Wang, Jun Lan, Jiqing Lu, Yida Dong, Xiao Huang, Zhixiong Li, Longyang Lin, Yida Li

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引用次数: 0

Abstract

Indium Gallium Zinc Oxide (IGZO) thin‐film transistors (TFTs) offer promising potential for next‐gen monolithic three ‐ dimensional (M3D) integrated chips due to their decent mobility, excellent electrostatic characteristics, and low‐temp processing. However, mobility in IGZO TFT is still underwhelming. Here, accurate modulation of the Indium (In) ratio via a plasma‐enhanced atomic‐layer deposition (PEALD) approach is investigated, together with a post‐deposition annealing (PDA) process over multiple temperatures. Through detailed material characterization, it is elucidated that a high In ratio with PDA favorｓ more In─O bonding and reduction of defects state. While a higher PDA temperature results in a higher mobility, other electrical performance is degraded due to unwanted defects generation. Optimized IGZO (In (5): Ga (1): Zn (1)) TFT is obtained after a PDA of 350 °C with a significant enhancement in field‐effect mobility (µFE) from 25.10 to 66.04 cm2 V·s−1. In addition, the TFT achieves other excellent electrical performance, including an Ion‐off of 107, low subthreshold swing (SS) of 79.25 mV dec−1, and threshold voltage (VTH) of −0.39 V. Building upon the optimized IGZO TFT, a n‐ IGZO TFT‐based pseudo enhancement load (PEL) inverter is presented, achieving robust rail‐to‐rail operation, thus demonstrating its suitability for integration in CMOS backend‐of‐line (BEOL) for high‐performance circuitries.

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通过等离子体增强原子层沉积方法在BEOL兼容电路中作为IGZO薄膜晶体管迁移率增强剂的铟合金化

铟镓锌氧化物（IGZO）薄膜晶体管（TFTs）由于其良好的迁移率、优异的静电特性和低温工艺，为下一代单片三维（M3D）集成芯片提供了广阔的潜力。然而，IGZO TFT的移动性仍然不尽如人意。在这里，通过等离子体增强原子层沉积（PEALD）方法研究了铟（In）比的精确调制，以及在多个温度下的沉积后退火（PDA）工艺。通过详细的材料表征，阐明了高In比的PDA有利于更多的In─O键合和缺陷状态的降低。虽然较高的PDA温度会导致更高的迁移率，但由于产生不必要的缺陷，其他电气性能会降低。在350°C的PDA下，获得了优化的IGZO (In (5): Ga (1): Zn (1)) TFT，其场效应迁移率（µFE）从25.10提高到66.04 cm2 V·s−1。此外，TFT还实现了其他优异的电学性能，包括107的离子关闭，79.25 mV / dec - 1的低亚阈值摆幅（SS）和- 0.39 V的阈值电压（VTH）。在优化的IGZO TFT基础上，提出了一种基于n - IGZO TFT的伪增强负载（PEL）逆变器，实现了稳健的轨对轨运行，从而证明了其适合集成在高性能电路的CMOS后端线（BEOL）中。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Advanced Electronic Materials NANOSCIENCE & NANOTECHNOLOGYMATERIALS SCIE-MATERIALS SCIENCE, MULTIDISCIPLINARY

CiteScore

11.00

自引率

3.20%

发文量

433

期刊介绍： Advanced Electronic Materials is an interdisciplinary forum for peer-reviewed, high-quality, high-impact research in the fields of materials science, physics, and engineering of electronic and magnetic materials. It includes research on physics and physical properties of electronic and magnetic materials, spintronics, electronics, device physics and engineering, micro- and nano-electromechanical systems, and organic electronics, in addition to fundamental research.