Integration of W vias for individual coupling control in 28 nm FD-SOI qubit arrays

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-08-12 DOI:10.1016/j.sse.2025.109205

G.A. Elbaz , J. Pelloux-Prayer , K. Gruel , P. Torresani , R. Lethiecq , P.L. Julliard , C. Suarez-Segovia , F. Arnaud , E. Nowak , T. Meunier , B.C. Paz

引用次数: 0

Abstract

Using known industrial fabrication methods, we repurpose W vias and, with a single contact patterning step, integrate both gates to define the electrochemical potential of quantum dots (QDs) and vias to define their coupling barriers in CMOS-based, linear qubit arrays. We show both simulated and experimental results of individual coupling control of QDs in arrays that were fully fabricated in a foundry on the 28 nm FD-SOI platform. We show detailed wafer-level transfer characteristics for each barrier implemented on a 1x3 linear array, at room temperature and at 2 K, which demonstrate that the vias are well-behaved MOSFET gates with electrostatic control over the Si channel.

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集成用于28纳米FD-SOI量子比特阵列单个耦合控制的W通孔

使用已知的工业制造方法，我们重新利用W过孔，并通过单个接触图图化步骤，集成两个门来定义量子点（QDs）的电化学电位，并在基于cmos的线性量子比特阵列中定义它们的耦合势垒。我们展示了在28纳米FD-SOI平台上在铸造厂完全制造的阵列中量子点的单个耦合控制的模拟和实验结果。我们展示了在室温和2k下，在1x3线性阵列上实现的每个势垒的详细晶圆级转移特性，这表明过孔是性能良好的MOSFET栅极，具有对Si沟道的静电控制。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.