Direct extraction of parasitic source and drain resistances in MOSFETs using saturation current ratio

Abstract

We propose a saturation current ratio technique (SCRT) for the separate extraction of parasitic source and drain resistances (R_S and R_D) in metal–oxide–semiconductor field-effect transistors (MOSFETs). Unlike conventional methods that require multiple devices or prior knowledge of device parameters, SCRT enables accurate characterization of parasitic resistances using a single device through simple DC measurements. The technique employs a dual configuration by alternating the roles of the source and drain during forward and reverse measurement sweeps. By analyzing the ratio between the drain saturation currents measured in each configuration, SCRT effectively separates R_S and R_D by quantifying their individual contributions to the voltage drop across the source and drain terminals. Experimental validation on both n-channel and p-channel MOSFETs with various channel lengths and widths confirms the robustness, accuracy, and reproducibility of the proposed method. SCRT offers a practical and efficient approach for characterizing asymmetric parasitic resistances in individual devices, making it a reliable alternative to conventional extraction techniques.