Source/drain metal-dependent oxygen scavenging from the viewpoint of the decoupling between source/drain resistance and threshold voltage in InGaZnO thin-film transistors

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-08-05 DOI:10.1016/j.sse.2025.109202

Seungki Kim , Wonjung Kim , Seong Hoon Jeon , Changwook Kim , Dong Myong Kim , Sung-Jin Choi , Yoon Jung Lee , Dae Hwan Kim

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引用次数: 0

Abstract

Reducing source-drain resistance (R_SD) in oxide semiconductor thin-film transistors (TFTs) mainly impacts the performance and reliability of devices and circuits. Oxygen scavenging (OS) is commonly used during process integration to reduce R_SD, including contact resistance between source-drain (S/D) metal and oxide semiconductors. Meanwhile, the lower R_SD, the better, but the threshold voltage (V_T) should be optimized depending on the application. Therefore, it is essential to decouple R_SD and V_T when applying OS.

In this study, the OS effect depending on the S/D metal of amorphous InGaZnO (a-IGZO) TFT was investigated from the perspective of decoupling R_SD and V_T. As a result of comparing Cu, Ti, and Al as S/D metals, when Al, which has a high metal–oxygen (M−O) bond strength, was used as the source-drain metal, V_T and R_SD decreased and on-current (I_on) increased compared to when Ti was used. A comprehensive analysis of TFT’s electrical characteristics (V_T, mobility, I_on), X-ray photoelectron spectroscopy (XPS), subgap density of states (DoS), and lateral distribution of thermal equilibrium carrier concentration (n₀(y)) indicates that the occurrence and diffusion of oxygen vacancy (V_O) due to OS in the S/D region cause an increase in subgap DoS and gate-to-S/D overlap length (L_OV) and a decrease in V_T due to an increase in donor concentration in the center of the channel (N_CH) due to a change in n₀(y) profile.

While R_SD changes before and after post-annealing are ×1.087 (Cu), ×0.606 (Ti), and ×0.283 (Al), N_CH changes are ×0.985 (Cu), ×1.267 (Al), and ×1.183 (Ti). The ΔV_T’s before and after post-annealing are + 0.119 V (Cu), −0.206 V (Al), and − 0.045 V (Ti), while ΔI_on’s are ×0.724 (Cu), ×1.222 (Al), and ×1.193 (Ti). Therefore, it is found that Ti is more advantageous than Al in terms of decoupling R_SD and V_T.

Our result becomes more critical in employing oxide semiconductor TFTs as the back end of line (BEOL) devices because the phenomenon of V_T being affected in improving R_SD using OS can become more severe in high-temperature processes. Furthermore, our result suggests that when selecting S/D metals and annealing conditions for OS, it is necessary to fully consider not only the R_SD reduction but also the degree to which R_SD and V_T can be decoupled.

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从InGaZnO薄膜晶体管源/漏极电阻和阈值电压去耦的角度看源/漏极金属依赖的氧清除

降低氧化物半导体薄膜晶体管（TFTs）的源漏电阻（RSD）主要影响器件和电路的性能和可靠性。氧清除（OS）通常用于工艺集成过程中，以降低RSD，包括源漏（S/D）金属和氧化物半导体之间的接触电阻。同时，RSD越低越好，但阈值电压（VT）应根据应用进行优化。因此，在应用OS时解耦RSD和VT是必要的。本研究从RSD和VT解耦合的角度研究了非晶InGaZnO (a- igzo) TFT的OS对S/D金属的影响。通过比较Cu、Ti和Al作为S/D金属，当Al作为源-漏金属时，与Ti相比，具有高金属-氧（M−O）结合强度的Al作为源-漏金属时，VT和RSD降低，导通电流（Ion）增加。综合分析了TFT的电学特性（VT、迁移率、离子）、x射线光电子能谱（XPS）、子隙态密度（DoS）、和热平衡载流子浓度（n0(y)）的横向分布表明，氧空位（VO）在S/D区域的发生和扩散导致子隙DoS和栅极-S/D重叠长度（LOV）的增加，而由于n0(y)分布的变化导致通道中心供体浓度（NCH）的增加而导致VT的降低。退火前后RSD变化分别为×1.087 （Cu）、×0.606 （Ti）和×0.283 (Al)， NCH变化分别为×0.985 （Cu）、×1.267 （Al）和×1.183 （Ti）。退火前后的ΔVT分别为+ 0.119 V （Cu）、−0.206 V （Al）和−0.045 V (Ti)， ΔIon分别为×0.724 （Cu）、×1.222 （Al）和×1.193 （Ti）。因此，我们发现Ti在去耦RSD和VT方面比Al更有利。我们的结果对于使用氧化物半导体TFTs作为后端线（BEOL）器件变得更加关键，因为使用OS改善RSD时VT受到影响的现象在高温过程中会变得更加严重。此外，我们的结果表明，在选择S/D金属和OS的退火条件时，不仅需要充分考虑RSD的降低，还需要充分考虑RSD和VT可以解耦的程度。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.