Manufacturing-Friendly SOT-MTJ Device With High Reliability and Switching Efficiency

IF 4.5 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Lei Zhao;Shasha Wang;Hengan Zhou;Xingyu Zhu;Kaiyuan Zhou;Zhenghui Ji;Guilin Chen;Yang Gao;Enlong Liu;Wenlong Yang;Difei Yuan;Ming Wang;Zejie Zheng;Xiaolei Yang;Shikun He
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Abstract

We propose a novel manufacturing-friendly self-aligned rounded-rectangle (SARR) spin-orbit torque magnetic tunnel junction (SOT-MTJ) device, in which the rounded-rectangle-shaped MTJ pillar and SOT channel are defined by single-step etch process. Two via-type bottom electrodes (BEs) are located at both ends beneath the MTJ pillar, with their entire top surfaces covered by the MTJ pillar. This device architecture eliminates the need for precise etch-stop control and can fundamentally address the critical process window limitation that has plagued the conventional SOT-MTJ fabrication. In addition, the tunneling magnetoresistance (TMR) of as high as 125%, reliable electrical switching down to 2 ns and over $10^{{12}}$ writing cycles are achieved in the device. The SARR SOT-MTJ with perpendicular magnetic anisotropy (PMA) exhibits a significant enhancement in thermal stability ( $\Delta \text {)}$ while achieving approximately 1.5X switching efficiency ( ${\Delta /}{I}_{{c}{0}}\text {)}$ improvement when its short side matches the diameter of the conventional circular SOT-MTJ with PMA. We conclude that the proposed SARR SOT-MTJ device, featuring excellent performance, shows great potential in the development of large-scale SOT-MRAM chip.
具有高可靠性和开关效率的制造友好型SOT-MTJ器件
提出了一种新型的制造友好型自对准圆矩形(SARR)自旋轨道转矩磁隧道结(SOT-MTJ)器件,其中圆矩形MTJ柱和SOT通道由单步蚀刻工艺定义。两个过孔型底电极(BEs)位于MTJ柱下方的两端,其整个顶表面被MTJ柱覆盖。这种器件架构消除了对精确蚀刻停止控制的需要,并且可以从根本上解决困扰传统SOT-MTJ制造的关键工艺窗口限制。此外,该器件还实现了高达125%的隧道磁电阻(TMR)、低至2ns的可靠电开关和超过$10^{{12}}$的写入周期。具有垂直磁各向异性(PMA)的SARR SOT-MTJ在热稳定性($\Delta \text{)}$方面有显著提高,当其短侧与具有PMA的传统圆形SOT-MTJ的直径相匹配时,其开关效率(${\Delta /}{I}_{{c}{0}}\text{)}$提高约1.5倍。我们认为所提出的SARR SOT-MTJ器件具有优异的性能,在大规模SOT-MRAM芯片的开发中具有很大的潜力。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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