A 2 pA/√Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5 GHz Bandwidth for Optical Receiver

IF 2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE
Yihao Yang;Dan Li;Nan Qi;Binhao Wang
{"title":"A 2 pA/√Hz Input-Referred Noise TIA in 180-nm CMOS With 2.5 GHz Bandwidth for Optical Receiver","authors":"Yihao Yang;Dan Li;Nan Qi;Binhao Wang","doi":"10.1109/LSSC.2025.3584266","DOIUrl":null,"url":null,"abstract":"This letter describes an ultralow-noise, high-speed transimpedance amplifier (TIA) applied to the analog front-end (AFE) circuit of the high-sensitivity optical receiver. A combination of a three-stage amplifier and two positive feedback Miller capacitors is introduced to comprehensively reduce the input-referred noise current (IRNC) of a shunt-feedback TIA (SFTIA) and to extend its bandwidth (BW). The proposed SFTIA utilizes an 80 K<inline-formula> <tex-math>$\\Omega $ </tex-math></inline-formula> resistor as the feedback resistor (RF) and achieves a BW of 2.5 GHz and an average IRNC of only 2 pA/<inline-formula> <tex-math>$\\surd $ </tex-math></inline-formula>Hz in 180 nm CMOS technology, which is the lowest TIA noise reported to date above the GHz BW. Although the fabrication process is not as advanced as the state-of-the-art process, we believe it remains valuable and instructive for a wide variety of applications requiring low noise and high sensitivity.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"8 ","pages":"189-192"},"PeriodicalIF":2.0000,"publicationDate":"2025-06-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11058975/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0

Abstract

This letter describes an ultralow-noise, high-speed transimpedance amplifier (TIA) applied to the analog front-end (AFE) circuit of the high-sensitivity optical receiver. A combination of a three-stage amplifier and two positive feedback Miller capacitors is introduced to comprehensively reduce the input-referred noise current (IRNC) of a shunt-feedback TIA (SFTIA) and to extend its bandwidth (BW). The proposed SFTIA utilizes an 80 K $\Omega $ resistor as the feedback resistor (RF) and achieves a BW of 2.5 GHz and an average IRNC of only 2 pA/ $\surd $ Hz in 180 nm CMOS technology, which is the lowest TIA noise reported to date above the GHz BW. Although the fabrication process is not as advanced as the state-of-the-art process, we believe it remains valuable and instructive for a wide variety of applications requiring low noise and high sensitivity.
一种基于2.5 GHz带宽、180nm CMOS的2pa /√Hz输入参考噪声TIA
本文介绍了一种应用于高灵敏度光接收机模拟前端(AFE)电路的超低噪声、高速跨阻放大器(TIA)。为了全面降低并联反馈TIA (SFTIA)的输入参考噪声电流(IRNC),并延长其带宽(BW),引入了一个三级放大器和两个正反馈米勒电容器的组合。提出的SFTIA采用80 K ω ω电阻作为反馈电阻(RF),在180 nm CMOS技术中实现了2.5 GHz的BW和平均IRNC仅为2 pA/ $ $ surd $ Hz,这是迄今为止报道的高于GHz BW的最低TIA噪声。虽然制造工艺不如最先进的工艺先进,但我们相信它对于需要低噪音和高灵敏度的各种应用仍然有价值和指导意义。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
求助全文
约1分钟内获得全文 求助全文
来源期刊
IEEE Solid-State Circuits Letters
IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering
CiteScore
4.30
自引率
3.70%
发文量
52
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信