A 10.9-nV/√Hz, 74.9-dB DR, 20-MS/s Ultrasound Analog Front End for Fully Digital Beamforming

IF 2.2 Q3 COMPUTER SCIENCE, HARDWARE & ARCHITECTURE

IEEE Solid-State Circuits Letters Pub Date : 2025-06-20 DOI:10.1109/LSSC.2025.3581584

Changde Ding;Yan Zhu;Pengjie Wang;Zhiliang Hong;Jiawei Xu

{"title":"A 10.9-nV/√Hz, 74.9-dB DR, 20-MS/s Ultrasound Analog Front End for Fully Digital Beamforming","authors":"Changde Ding;Yan Zhu;Pengjie Wang;Zhiliang Hong;Jiawei Xu","doi":"10.1109/LSSC.2025.3581584","DOIUrl":null,"url":null,"abstract":"This letter presents a compact and energy-efficient analog front-end (AFE) circuit for fully digital beamforming in endoscopic and catheter-based 3-D ultrasound imaging. The AFE converts single-ended analog input from each transducer element into a 10-bit digital output through a low-noise amplifier (LNA) and a 20-MS/s SAR ADC. To minimize chip area and power consumption, the LNA employs a capacitor-splitting inverter-based amplifier with dynamic power control, while the ADC utilizes unit-length capacitors and digital error correction. A modified monotonic switching improves the conversion rate, and the kickback noise is reduced by an enhanced Elzakker comparator. Fabricated in a 0.18-<inline-formula> <tex-math>$\\mu $ </tex-math></inline-formula>m CMOS process, the ultrasound AFE occupies a low silicon area of 0.052 mm2/channel, achieves 74.93-dB dynamic range (DR), 10.9-nV/<inline-formula> <tex-math>$\\surd $ </tex-math></inline-formula>Hz input referred noise, and −58.33-dB total harmonic distortion (THD). The average power consumption is 1.34 mW/channel.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"8 ","pages":"185-188"},"PeriodicalIF":2.2000,"publicationDate":"2025-06-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/11045697/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}

引用次数: 0

Abstract

This letter presents a compact and energy-efficient analog front-end (AFE) circuit for fully digital beamforming in endoscopic and catheter-based 3-D ultrasound imaging. The AFE converts single-ended analog input from each transducer element into a 10-bit digital output through a low-noise amplifier (LNA) and a 20-MS/s SAR ADC. To minimize chip area and power consumption, the LNA employs a capacitor-splitting inverter-based amplifier with dynamic power control, while the ADC utilizes unit-length capacitors and digital error correction. A modified monotonic switching improves the conversion rate, and the kickback noise is reduced by an enhanced Elzakker comparator. Fabricated in a 0.18-

$\mu $

m CMOS process, the ultrasound AFE occupies a low silicon area of 0.052 mm2/channel, achieves 74.93-dB dynamic range (DR), 10.9-nV/

$\surd $

Hz input referred noise, and −58.33-dB total harmonic distortion (THD). The average power consumption is 1.34 mW/channel.

查看原文本刊更多论文

用于全数字波束形成的10.9 nv /√Hz, 74.9 db DR， 20 ms /s超声模拟前端

这封信提出了一个紧凑和节能的模拟前端（AFE）电路，用于内窥镜和基于导管的三维超声成像的全数字波束形成。AFE通过低噪声放大器（LNA）和20 ms /s SAR ADC将来自每个传感器元件的单端模拟输入转换为10位数字输出。为了最大限度地减少芯片面积和功耗，LNA采用基于电容分裂逆变器的放大器和动态功率控制，而ADC采用单位长度电容器和数字纠错。改进的单调开关提高了转换率，并且通过增强的Elzakker比较器降低了反踢噪声。超声AFE采用0.18- $ $ μ $ m CMOS工艺制造，低硅面积为0.052 mm2/通道，动态范围为74.93 db，输入参考噪声为10.9 nv / $ $ surd $ Hz，总谐波失真（THD）为- 58.33 db。平均功耗为1.34 mW/通道。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

IEEE Solid-State Circuits Letters Engineering-Electrical and Electronic Engineering

CiteScore

4.30

自引率

3.70%

发文量