Hot carrier stress in junctionless gate-all-around nMOSFETs under different bias conditions

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-06-29 DOI:10.1016/j.sse.2025.109187

Wen-Teng. Chang , Liang-I. Cai , Hung-Hsi Chen , Jen-Chien Li , Yao-Jen Lee

引用次数: 0

Abstract

In conventional long-channel MOSFETs, the most significant hot carrier degradation at inversion-mode junctions typically occurs when the gate voltage (V_GS) is approximately half the drain voltage (V_DS). This work investigates the impact of different V_GS/V_DS ratios (1:2, 1:1, and 2:1) on the electrical stress behavior of Junctionless Gate-All-Around (JLGAA) nMOSFETs. Unlike inversion-mode devices, JLGAA transistors exhibit more pronounced threshold voltage (V_t) shifts under V_GS/V_DS ratios of 1:1 and 2:1 compared to 1:2, especially over longer stress durations. Interestingly, the 1:2 stress condition reveals a V_t turnaround effect during the early stages of stress. TCAD simulations support these observations, showing that a 2:1 V_GS/V_DS ratio generates a stronger electric field across the gate oxide compared to other bias conditions.

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不同偏置条件下无结栅栅型nmosfet的热载流子应力

在传统的长沟道mosfet中，当栅极电压（VGS）约为漏极电压（VDS）的一半时，反转模式结处最显著的热载流子退化通常发生。本文研究了不同VGS/VDS比（1:2,1:1和2:1）对无结栅极全能（JLGAA） nmosfet电应力行为的影响。与反转模式器件不同，与1:2相比，JLGAA晶体管在VGS/VDS比为1:1和2:1时表现出更明显的阈值电压（Vt）偏移，特别是在较长的应力持续时间下。有趣的是，在1:2的应激条件下，在应激的早期阶段出现了Vt扭转效应。TCAD模拟支持这些观察结果，表明与其他偏置条件相比，2:1的VGS/VDS比在栅极氧化物上产生更强的电场。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.