Yiwen Li , Lihui Yu , Yilin Zhang , Qiutong Zhao , Jingquan Guo , Yingjie Fan , Zhuzhuoyue Chen , Jingjing Zhang , Shujun Ye
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引用次数: 0
Abstract
Vertical silicon nanopillars are essential for vertical gate-all-around transistors in advanced integrated circuit. However, achieving high aspect ratios with precise dimensional control remains a key fabrication challenge. In this work, cylindrical silicon nanopillars with diameters below 200 nm, smooth and vertical sidewalls are developed using SF6/C4F8 gas mixture within an Inductively Coupled Plasma Reactive Ion Etching system. The etching rate, sidewall angle, and structural morphology of nanopillars are analyzed under the impact of C4F8 gas flow, pressure, source power, and bias power. The single-step continuous etching approach utilizing SF6/C4F8 gas mixture involves three mechanisms: fluorocarbon passivating film deposition produced by CFx radicals, directional ion bombardment that removes passivation layer, and isotropic etching driven by F∗ radicals. By optimizing etching parameters, vertically aligned cylindrical Si nanopillars with height up to 8.3 μm and aspect ratio of 40:1 are produced, exhibiting excellent diameter uniformity. This research contributes valuable insights into SF6/C4F8 plasma etching dynamics and highlights its potential for advanced applications involving silicon nanopillars.
期刊介绍:
Materials Science in Semiconductor Processing provides a unique forum for the discussion of novel processing, applications and theoretical studies of functional materials and devices for (opto)electronics, sensors, detectors, biotechnology and green energy.
Each issue will aim to provide a snapshot of current insights, new achievements, breakthroughs and future trends in such diverse fields as microelectronics, energy conversion and storage, communications, biotechnology, (photo)catalysis, nano- and thin-film technology, hybrid and composite materials, chemical processing, vapor-phase deposition, device fabrication, and modelling, which are the backbone of advanced semiconductor processing and applications.
Coverage will include: advanced lithography for submicron devices; etching and related topics; ion implantation; damage evolution and related issues; plasma and thermal CVD; rapid thermal processing; advanced metallization and interconnect schemes; thin dielectric layers, oxidation; sol-gel processing; chemical bath and (electro)chemical deposition; compound semiconductor processing; new non-oxide materials and their applications; (macro)molecular and hybrid materials; molecular dynamics, ab-initio methods, Monte Carlo, etc.; new materials and processes for discrete and integrated circuits; magnetic materials and spintronics; heterostructures and quantum devices; engineering of the electrical and optical properties of semiconductors; crystal growth mechanisms; reliability, defect density, intrinsic impurities and defects.