{"title":"Application of explainable AI on deep learning-based gate length scalable IV parameter extractor for BSIM-IMG","authors":"Fredo Chavez , Jen-Hao Chen , Chien-Ting Tung , Chenming Hu , Sourabh Khandelwal","doi":"10.1016/j.sse.2025.109154","DOIUrl":null,"url":null,"abstract":"<div><div>A new deep-learning(DL) based gate length scalable I-V parameter extraction technique for FDSOI technology on industry-standard BSIM-IMG compact model is presented. For the first time, the learning quality of DL extractors has been studied using an explainable AI technique called SHapley Additive exPlanations (SHAP). Through analysis, it is shown that the single-step DL parameter extraction can get deviated by less relevant relationships between the <span><math><mrow><mi>I</mi><mo>−</mo><mi>V</mi></mrow></math></span> region and the BSIM-IMG parameters. A multi-step DL extraction is then designed by applying expertise in BSIM-IMG model parameters. The multi-step DL extractor has a customized DL architecture that forces the DL model to learn the relevant relationship between the input <span><math><msub><mrow><mi>I</mi></mrow><mrow><mi>D</mi></mrow></msub></math></span> datapoint and the BSIM-IMG parameters. The single- and multi-step DL extraction has been tested for measured data with gate-lengths (<span><math><msub><mrow><mi>L</mi></mrow><mrow><mi>G</mi></mrow></msub></math></span>) ranging from 52 nm to 961 nm. The multi-step DL extractor shows better accuracy in I-V and better scaling to the key electrical parameters as compared to the single-step DL parameter extraction. The developed solution has improved the accuracy, shortened extraction time, reduced the complexity, and can assist in very fast scalable model generation for FDSOI technologies.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"229 ","pages":"Article 109154"},"PeriodicalIF":1.4000,"publicationDate":"2025-06-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110125000991","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
A new deep-learning(DL) based gate length scalable I-V parameter extraction technique for FDSOI technology on industry-standard BSIM-IMG compact model is presented. For the first time, the learning quality of DL extractors has been studied using an explainable AI technique called SHapley Additive exPlanations (SHAP). Through analysis, it is shown that the single-step DL parameter extraction can get deviated by less relevant relationships between the region and the BSIM-IMG parameters. A multi-step DL extraction is then designed by applying expertise in BSIM-IMG model parameters. The multi-step DL extractor has a customized DL architecture that forces the DL model to learn the relevant relationship between the input datapoint and the BSIM-IMG parameters. The single- and multi-step DL extraction has been tested for measured data with gate-lengths () ranging from 52 nm to 961 nm. The multi-step DL extractor shows better accuracy in I-V and better scaling to the key electrical parameters as compared to the single-step DL parameter extraction. The developed solution has improved the accuracy, shortened extraction time, reduced the complexity, and can assist in very fast scalable model generation for FDSOI technologies.
期刊介绍:
It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.