Low-loss silicon substrates with PN passivation in 28 nm FD-SOI

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-06-08 DOI:10.1016/j.sse.2025.109174

M. Rack , M. Nabet , Y. Bendou , M. Vanbrabant , M. Moulin , Q. Courte , S. Cremer , A. Cathelin , D. Lederer , J.-P. Raskin

引用次数: 0

Abstract

In this work, the 28 nm FD-SOI technology from ST Microelectronics was run for the first time on high-resistivity wafer samples. The gain in RF performance through the use of high-resistivity bulk is characterized in terms of losses, effective resistivity (ρ_eff) and generated harmonics through on-wafer measurements of coplanar waveguides (CPW). Beyond the use of a high-resistivity bulk, special care was taken to ensure a state of high-resistivity at the silicon/oxide interface. This was achieved through the PN junction interface passivation solution, implemented locally on the wafer at the foundry level, below passive RF devices. A study was performed on the dose and energy parameters of these implants to achieve optimal RF performance and giving insight into the PN design.

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28 nm FD-SOI中PN钝化的低损耗硅衬底

在这项工作中，ST微电子首次在高电阻率晶圆样品上运行了28 nm FD-SOI技术。通过使用高电阻率体来获得射频性能的增益，其特征在于损耗、有效电阻率（ρeff）和通过共面波导（CPW）的晶圆上测量产生的谐波。除了使用高电阻体外，还特别注意确保硅/氧化物界面的高电阻状态。这是通过PN结接口钝化解决方案实现的，该解决方案在代工级的晶圆上局部实现，低于无源RF器件。研究人员对这些植入物的剂量和能量参数进行了研究，以实现最佳的射频性能，并深入了解PN设计。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.