Influence of N-type substrate’s bias potential on electrical characteristics of 4H-SiC integrated devices for All-SiC ICs

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-06-04 DOI:10.1016/j.sse.2025.109155

Yongjia Li, Guiqiang Zheng, Jie Ma, Yong Gu, Jiaxing Wei, Sheng Li, Long Zhang, Siyang Liu, Weifeng Sun

{"title":"Influence of N-type substrate’s bias potential on electrical characteristics of 4H-SiC integrated devices for All-SiC ICs","authors":"Yongjia Li, Guiqiang Zheng, Jie Ma, Yong Gu, Jiaxing Wei, Sheng Li, Long Zhang, Siyang Liu, Weifeng Sun","doi":"10.1016/j.sse.2025.109155","DOIUrl":null,"url":null,"abstract":"<div><div>In this paper, the influence of N-type substate’s bias potential on electrical characteristics of 4H Silicon carbide (SiC) integrated devices for all-SiC monolithic ICs are investigated by measurements and simulations. The devices were fabricated on 4H-SiC (0001) wafer with N-type substrate and P-type epitaxial layer. The measurement results show that changing bias potential of N-type substrate has significant effect on on-state <em>BV</em> (<em>BV<sub>ON</sub></em>) and off-state <em>BV</em> (<em>BV<sub>OFF</sub></em>) for high-voltage devices. Technology computer aided design (TCAD) simulations are carried out to give insight into the mechanism of the influence of substrate’s bias potential. In mechanism revealing, the connection type of substrate is divided into three modes: (i) grounded substate mode, (ii) floating substate mode, (iii) high-voltage substate mode, and different connection modes results in different depletion types in drift region, which in turn affects <em>BV<sub>ON</sub></em> and <em>BV<sub>OFF</sub></em>.</div><div>By comparison, floating substrate is the best choose among three connection modes mentioned above for high-voltage SiC devices. Based on the revealed influence mechanisms of substate’s bias potential, an efficient method to eliminate the influence of N-type substate’s bias potential is proposed in this paper, which results in stable and high <em>BV<sub>ON</sub></em> and <em>BV<sub>OFF</sub></em>.</div></div>","PeriodicalId":21909,"journal":{"name":"Solid-state Electronics","volume":"229 ","pages":"Article 109155"},"PeriodicalIF":1.4000,"publicationDate":"2025-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"Solid-state Electronics","FirstCategoryId":"101","ListUrlMain":"https://www.sciencedirect.com/science/article/pii/S0038110125001005","RegionNum":4,"RegionCategory":"物理与天体物理","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}

引用次数: 0

Abstract

In this paper, the influence of N-type substate’s bias potential on electrical characteristics of 4H Silicon carbide (SiC) integrated devices for all-SiC monolithic ICs are investigated by measurements and simulations. The devices were fabricated on 4H-SiC (0001) wafer with N-type substrate and P-type epitaxial layer. The measurement results show that changing bias potential of N-type substrate has significant effect on on-state BV (BV_ON) and off-state BV (BV_OFF) for high-voltage devices. Technology computer aided design (TCAD) simulations are carried out to give insight into the mechanism of the influence of substrate’s bias potential. In mechanism revealing, the connection type of substrate is divided into three modes: (i) grounded substate mode, (ii) floating substate mode, (iii) high-voltage substate mode, and different connection modes results in different depletion types in drift region, which in turn affects BV_ON and BV_OFF.

By comparison, floating substrate is the best choose among three connection modes mentioned above for high-voltage SiC devices. Based on the revealed influence mechanisms of substate’s bias potential, an efficient method to eliminate the influence of N-type substate’s bias potential is proposed in this paper, which results in stable and high BV_ON and BV_OFF.

查看原文本刊更多论文

n型衬底偏置电位对全sic集成电路中4H-SiC集成器件电特性的影响

本文通过测量和仿真研究了n型基态偏置电位对4H碳化硅（SiC）集成器件电特性的影响。器件采用n型衬底和p型外延层在4H-SiC（0001）晶圆上制备。测量结果表明，改变n型衬底的偏置电位对高压器件的通断态BV （BVON）有显著影响。通过计算机辅助设计（TCAD）仿真研究了衬底偏置电位的影响机理。在机理揭示中，衬底的连接方式分为三种模式：(i)接地亚态模式，（ii）浮动亚态模式，（iii）高压亚态模式，不同的连接方式导致漂移区不同的耗尽类型，进而影响BVON和BVOFF。通过比较，在上述三种连接方式中，浮动衬底是用于高压SiC器件的最佳选择。在揭示了基态偏置电位影响机理的基础上，提出了一种消除n型基态偏置电位影响的有效方法，从而获得稳定的高BVON和BVOFF。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

求助全文

约1分钟内获得全文求助全文

来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.