Performance optimization of III–V homo/heterojunction line TFET: Device-circuit Interaction

IF 1.4 4区 物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC
Sourabh Panwar , Kummari Kesava , Shobhit Srivastava , Shashidhara M , Sandeep Rankawat , Abhishek Acharya
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引用次数: 0

Abstract

In this work, we optimize the parameters of the epitaxial layer doping, thickness (Nepi, Tepi), gate overlap length (Lov) for the n-type III–V materials (InGaAs, InP, GaAsSb) based Line tunnel field effect transistor (L-TFET). The L-TFET with III–V materials gives a high ON current and steep subthreshold slope with less power consumption. This improvement in the device performance is due to the small bandgap of the III–V materials. The optimized values of Lov, Nepi, and Tepi are 4 nm, 1 × 1019 cm−3, and 20 nm, respectively. The optimized parameters can be used for designing homo/heterojunction III–V material-based L-TFETs, and it found that the performance of GaAsSb/InGaAs heterojunction L-TFET is better in terms of Ion/Ioff ratio, transconductance (gm) and subthreshold swing (SS). We have designed the inverter using n-type and p-type InGaAs homojunction and GaAsSb/InGaAs heterojunction L-TFETs to analyze the voltage transfer characteristics (VTC) and transient response of the inverter.
III-V型同质/异质结线TFET的性能优化:器件-电路交互
在这项工作中,我们优化了n型III-V材料(InGaAs, InP, GaAsSb)基线隧道场效应晶体管(L-TFET)的外延层掺杂、厚度(Nepi, Tepi)、栅极重叠长度(Lov)等参数。采用III-V材料的L-TFET具有高导通电流和陡峭的亚阈值斜率,功耗更低。这种器件性能的改善是由于III-V材料的小带隙。Lov、Nepi和Tepi的优化值分别为4 nm、1 × 1019 cm−3和20 nm。优化后的参数可用于设计基于III-V材料的L-TFET,并发现GaAsSb/InGaAs异质结的L-TFET在离子/开关比、跨导(gm)和亚阈值摆幅(SS)方面性能更好。采用n型和p型InGaAs同质结和GaAsSb/InGaAs异质结l - tfet设计了逆变器,分析了逆变器的电压转移特性(VTC)和瞬态响应。
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来源期刊
Solid-state Electronics
Solid-state Electronics 物理-工程:电子与电气
CiteScore
3.00
自引率
5.90%
发文量
212
审稿时长
3 months
期刊介绍: It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.
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