Accurate Analytical Modeling of 3-D Capacitor Based on Coaxial TSV Array and RDL

Abstract

This article presents an accurate analytical model for the calculation of circuit parameters of the 3-D capacitor implemented by coaxial through-silicon via (CTSV) and redistribution layer (RDL). The model meticulously accounts for the parasitic components, including coupling capacitance between CTSVs and from RDL to CTSV, alongside the inherent coaxial transmission line capacitance of the CTSV, ensuring its applicability in array configurations. Furthermore, the frequency-dependent behavior of capacitors is incorporated. Validation was conducted through two approaches: simulations using commercial software and experimental measurements of fabricated 3-D capacitors with varying numbers of CTSVs. Upon comparison, the results demonstrate excellent agreement with a maximum error of less than 3% across a wide frequency range from 0.1 to 100 GHz and significant reduction of the runtime, offering a reliable and efficient tool for 3-D capacitor design in advanced integrated circuits.