Understanding Frequency Dependence of Trap Generation Under AC Positive Bias Temperature Instability Stress in Si n-FinFETs

IF 2 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of the Electron Devices Society Pub Date : 2025-03-09 DOI:10.1109/JEDS.2025.3567049

Yunfei Shi;Hao Chang;Hong Yang;Qiangzhu Zhang;Qianqian Liu;Bo Tang;Longda Zhou;Zhigang Ji;Junjie Li;Xiaobin He;Junfeng Li;Huaxiang Yin;Xiaolei Wang;Jun Luo;Wenwu Wang

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引用次数: 0

Abstract

In this paper, the frequency (f) dependence of trap generation in Si n-channel fin field-effect transistors (n-FinFETs) under AC positive bias temperature instability (PBTI) stress is investigated by fast direct-current current-voltage (DCIV) method and the discharging-based multi-pulse energy profiling (DMP) technique. The experimental results show that both interface trap generation (

$\Delta $

NIT) and bulk trap generation (

$\Delta $

NOT) of n-FinFET under AC PBTI stress are almost independent of the AC frequency. However, further analysis shows that

$\Delta $

NOT consists of shallow traps near EC of Si and deep traps near Ev of Si. Moreover, about 22% of deep traps decrease with shallow traps increasing under 1.4V overdrive voltage (Vov) at 125°C with AC bias frequency increasing from 10 Hz to 1 MHz.

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了解Si - n- finet在交流正偏置温度不稳定应力下产生陷阱的频率依赖性

本文采用快速直流-电压（DCIV）方法和基于放电的多脉冲能量谱（DMP）技术研究了交流正偏置温度不稳定性（PBTI）应力下Si n沟道场效应晶体管（n- finfet）中陷阱产生的频率(f)依赖性。实验结果表明，在交流PBTI应力下，n-FinFET的界面陷阱产生（$\Delta $ NIT）和体陷阱产生（$\Delta $ NOT）几乎与交流频率无关。然而，进一步分析表明，$\Delta $ NOT由Si的EC附近的浅圈闭和Si的Ev附近的深圈闭组成。此外，在125°C下，当交流偏置频率从10 Hz增加到1 MHz时，1.4V的过驱动电压（Vov）下，约22%的深陷阱减少，浅陷阱增加。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology

CiteScore

5.20

自引率

4.30%

发文量

124

审稿时长

9 weeks

期刊介绍： The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.