Sunghyun Woo;Jihwan Lee;Gyunseok Ryu;Myounggon Kang
{"title":"Compact Modeling of 3D NAND Flash Memory With Ferroelectric Characteristics: A Comparative Analysis of O/N/O and O/N/F Structures","authors":"Sunghyun Woo;Jihwan Lee;Gyunseok Ryu;Myounggon Kang","doi":"10.1109/JEDS.2025.3567077","DOIUrl":null,"url":null,"abstract":"This study presents a compact model for three-dimensional (3D) NAND flash memory that incorporates ferroelectric properties to enable accurate circuit-level simulations. The model, implemented in Verilog-A, captures the saturation polarization-electric field (P-E) hysteresis behavior of a ferroelectric capacitor. To validate the model, simulation results are compared between TCAD and SPICE. Under identical programming conditions, the proposed oxide/nitride/ferroelectric (O/N/F) structure demonstrates approximately 3 V higher channel potential than the conventional oxide/nitride/oxide (O/N/O) structure, resulting in improved programming accuracy and cell stability. In addition, SPICE simulations run over an hour faster than TCAD, making the model efficient for circuit-level analysis.","PeriodicalId":13210,"journal":{"name":"IEEE Journal of the Electron Devices Society","volume":"13 ","pages":"427-430"},"PeriodicalIF":2.0000,"publicationDate":"2025-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10988629","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Journal of the Electron Devices Society","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10988629/","RegionNum":3,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
This study presents a compact model for three-dimensional (3D) NAND flash memory that incorporates ferroelectric properties to enable accurate circuit-level simulations. The model, implemented in Verilog-A, captures the saturation polarization-electric field (P-E) hysteresis behavior of a ferroelectric capacitor. To validate the model, simulation results are compared between TCAD and SPICE. Under identical programming conditions, the proposed oxide/nitride/ferroelectric (O/N/F) structure demonstrates approximately 3 V higher channel potential than the conventional oxide/nitride/oxide (O/N/O) structure, resulting in improved programming accuracy and cell stability. In addition, SPICE simulations run over an hour faster than TCAD, making the model efficient for circuit-level analysis.
期刊介绍:
The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.