{"title":"A 300-GHz-Band 36-Gb/s Scalable 2-D Phased-Array CMOS Double Superheterodyne Receiver","authors":"Satoshi Tanaka;Shinsuke Hara;Kyoya Takano;Akifumi Kasamatsu;Yoshiki Sugimoto;Kunio Sakakibara;Shunichi Kubo;Takeshi Yoshida;Shuhei Amakawa;Minoru Fujishima","doi":"10.1109/LSSC.2025.3566726","DOIUrl":null,"url":null,"abstract":"This letter presents a near-<inline-formula> <tex-math>$\\lambda $ </tex-math></inline-formula>/2-antenna-pitch 2-D phased-array CMOS receiver to address the challenge of implementing sub-THz beamforming with the narrow <inline-formula> <tex-math>$\\lambda $ </tex-math></inline-formula>/<inline-formula> <tex-math>$2~(\\approx ~555~\\mu $ </tex-math></inline-formula>m at 270 GHz) antenna pitch. A double superheterodyne architecture is adopted to reduce the area occupied by the 2-D RX array circuits by locating the E- and H-plane phase control circuits outside the array. Additionally, interpolated feeding is employed to enlarge the area available for the RX circuits by enabling an n-by-n array of RX elements to feed a near-<inline-formula> <tex-math>$\\lambda $ </tex-math></inline-formula>/2-pitch (<inline-formula> <tex-math>$2{n}$ </tex-math></inline-formula> – 1)-by-(<inline-formula> <tex-math>$2{n}$ </tex-math></inline-formula> – 1) antenna array composed of main and auxiliary antennas. A 40-nm CMOS prototype with <inline-formula> <tex-math>$2\\times 2$ </tex-math></inline-formula> RX elements feeding <inline-formula> <tex-math>$3\\times 3$ </tex-math></inline-formula> antenna elements demonstrate beam scanning ranges of approximately ±20° and ±30°in the E- and H-planes, respectively, and achieves 36-Gb/s QPSK signal transmission over a distance of 5 cm.","PeriodicalId":13032,"journal":{"name":"IEEE Solid-State Circuits Letters","volume":"8 ","pages":"133-136"},"PeriodicalIF":2.2000,"publicationDate":"2025-03-05","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"https://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=10985811","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Solid-State Circuits Letters","FirstCategoryId":"1085","ListUrlMain":"https://ieeexplore.ieee.org/document/10985811/","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q3","JCRName":"COMPUTER SCIENCE, HARDWARE & ARCHITECTURE","Score":null,"Total":0}
引用次数: 0
Abstract
This letter presents a near-$\lambda $ /2-antenna-pitch 2-D phased-array CMOS receiver to address the challenge of implementing sub-THz beamforming with the narrow $\lambda $ /$2~(\approx ~555~\mu $ m at 270 GHz) antenna pitch. A double superheterodyne architecture is adopted to reduce the area occupied by the 2-D RX array circuits by locating the E- and H-plane phase control circuits outside the array. Additionally, interpolated feeding is employed to enlarge the area available for the RX circuits by enabling an n-by-n array of RX elements to feed a near-$\lambda $ /2-pitch ($2{n}$ – 1)-by-($2{n}$ – 1) antenna array composed of main and auxiliary antennas. A 40-nm CMOS prototype with $2\times 2$ RX elements feeding $3\times 3$ antenna elements demonstrate beam scanning ranges of approximately ±20° and ±30°in the E- and H-planes, respectively, and achieves 36-Gb/s QPSK signal transmission over a distance of 5 cm.