Enhanced Silicon Crystallization on Dielectric Materials at Reduced Temperature

Abstract

We report the demonstration of the crystallization of amorphous arsenic and boron-doped silicon films on dielectric substrates at reduced thermal budgets. The conventional methods to form polycrystalline silicon generally require growth temperatures of at least $600~^{\circ }$ C, or high-temperature post-annealing to transform the silicon structure from amorphous into polycrystalline. Here, we show the formation of high-quality polycrystalline silicon at temperatures between $500~^{\circ }$ C and $550~^{\circ }$ C, which helps to reduce the thermal budget strain on heterojunction bipolar transistor devices. This advancement is attained by selecting buffer layer materials and fine-tuning film thickness. A notable increase in the film conductivity was observed, with improvements of 66% and 1719% for arsenic and boron-doped silicon films, respectively, compared to structured-mixed silicon films. The crystalline nature of the films is confirmed through top-view scanning electron microscopy coupled with ImageJ software analysis, offering a rapid, inline approach for crystal percentage quantification. Additionally, cross-sectional transmission electron microscopy analyses verify the complete film crystallization.