{"title":"ML-Driven Compact Models for RRAMs: Addressing Variability and Simulation Efficiency","authors":"Giyong Hong;In Huh;Joo Hyung You;Jae Myung Choe;Younggu Kim;Changwook Jeong","doi":"10.1109/LED.2025.3545909","DOIUrl":null,"url":null,"abstract":"Machine Learning (ML)-based compact modeling provides a promising alternative to traditional physics-based methods, enabling faster development of compact models for novel devices while offering improved predictive performance. For Resistive Random Access Memory (RRAM) devices, several ML-based compact models have been developed. However, these models often face two key challenges: they fail to capture stochastic cycle-to-cycle variations effectively, and they are difficult to accurately convert into Verilog-A models for SPICE simulations. To address these challenges, we propose a novel variation-aware ML-based compact model for RRAM, using modified deep ensemble techniques to account for cycle-to-cycle variations and model uncertainty, along with a newly designed state determination function to accurately capture resistive switching characteristics. Furthermore, by introducing knowledge distillation combined with a pruning-retraining process, the proposed model achieves a 67% reduction in simulation turnaround time while maintaining predictive accuracy, ensuring strong compatibility with SPICE simulations.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"876-879"},"PeriodicalIF":4.1000,"publicationDate":"2025-02-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10904470/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
引用次数: 0
Abstract
Machine Learning (ML)-based compact modeling provides a promising alternative to traditional physics-based methods, enabling faster development of compact models for novel devices while offering improved predictive performance. For Resistive Random Access Memory (RRAM) devices, several ML-based compact models have been developed. However, these models often face two key challenges: they fail to capture stochastic cycle-to-cycle variations effectively, and they are difficult to accurately convert into Verilog-A models for SPICE simulations. To address these challenges, we propose a novel variation-aware ML-based compact model for RRAM, using modified deep ensemble techniques to account for cycle-to-cycle variations and model uncertainty, along with a newly designed state determination function to accurately capture resistive switching characteristics. Furthermore, by introducing knowledge distillation combined with a pruning-retraining process, the proposed model achieves a 67% reduction in simulation turnaround time while maintaining predictive accuracy, ensuring strong compatibility with SPICE simulations.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.