P-Type SnO Thin-Film Transistor With Scaled Channel Lengths for High-Density Monolithic Integration in Complementary Logic Circuits Applications

IF 4.1 2区工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Electron Device Letters Pub Date : 2025-03-10 DOI:10.1109/LED.2025.3549439

Tsung-Che Chiang;Zhen-Hao Li;Cheng-Wei Wang;Pei-Yun Huang;Jo-Lin Chen;Yu-Ming Zhang;Yao-Chen Chien;Kai-Cheng Syu;You-Syuan Zhou;Po-Tsun Liu

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引用次数: 0

Abstract

This work successfully developed an optimized p-type oxide semiconductor thin-film transistor (TFT) using an 8 nm-thick tin monoxide (SnO) channel. The device shows a high hole mobility of ~2 cm2/V

$\cdot $

s, an on-off current ratio (ION/I

${}_{\text {OFF}}\text {)}$

over

$10^{{4}}$

, and a subthreshold swing (S.S.) of less than 0.3 V/decade. When the channel length (L

${}_{\text {CH}}\text {)}$

is reduced to 100 nm, the devices achieve high drain current density, a low S.S. of ~0.3 V/dec, and a near-enhancement mode threshold voltage (V

${}_{\text {TH}}\text {)}$

of 0.18 V. Additionally, short-channel transistors, including ITO n-TFT and SnO p-TFT, were integrated through a bottom-up fabrication approach to create full-oxide complementary logic circuits, such as inverters and NAND gates, within a monolithic three-dimensional (M3D) architecture. These circuits demonstrate excellent performance, including a high voltage gain of 73 V/V at V

${}_{\text {DD}}=3.6$

V and a large noise margin (NMH/NM

${}_{\text {L}}\text {)}$

of 1.14 V/1.12 V at V

${}_{\text {DD}}=2.8$

V. The fabrication is compatible with back-end-of-line (BEOL) process and operates under a low thermal budget, making it promising for M3D integrated circuits (M3D-ICs).

查看原文本刊更多论文

可缩放通道长度的p型SnO薄膜晶体管在互补逻辑电路中的高密度单片集成应用

本工作成功地开发了一种优化的p型氧化物半导体薄膜晶体管（TFT），该晶体管使用8纳米厚的氧化锡（SnO）通道。该器件具有~2 cm2/V $\cdot $ s的高空穴迁移率，通断电流比（ION/I ${}_{\text {OFF}}}\text{）}$超过$10^{{4}}$，亚阈值摆幅（S.S.）小于0.3 V/decade。当通道长度（L ${}_{\text {CH}}\text{）}$减小到100 nm时，器件实现了高漏极电流密度、~0.3 V/dec的低S.S.和0.18 V的近增强模式阈值电压（V ${}_{\text {TH}}\text{）}$。此外，短通道晶体管，包括ITO n-TFT和SnO p-TFT，通过自下而上的制造方法集成，在单片三维（M3D）架构中创建全氧化物互补逻辑电路，如逆变器和NAND门。这些电路表现出优异的性能，包括在V ${}_{\text {DD}}=3.6$ V时的高电压增益为73 V/V，以及在V ${}_{\text {L}}\text {DD}}=2.8$ V时的大噪声余量（NMH/NM ${}_{\text {DD}}}= 1.14 V/1.12 V）。该制造与后端线（BEOL）工艺兼容，并且在低热预算下运行，使其成为M3D集成电路（M3D- ic）的理想选择。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

IEEE Electron Device Letters 工程技术-工程：电子与电气

CiteScore

8.20

自引率

10.20%

发文量

551

审稿时长

1.4 months

期刊介绍： IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.