Linear Tuning of Positive Threshold Voltage in IGZO Thin-Film Transistors via Gate Dielectric Stack Engineering

IF 4.1 2区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC
Gangping Yan;Yanyu Yang;Lu Tai;Yuting Chen;Xueli Ma;Jinjuan Xiang;Gaobo Xu;Guilei Wang;Huaxiang Yin;Chao Zhao
{"title":"Linear Tuning of Positive Threshold Voltage in IGZO Thin-Film Transistors via Gate Dielectric Stack Engineering","authors":"Gangping Yan;Yanyu Yang;Lu Tai;Yuting Chen;Xueli Ma;Jinjuan Xiang;Gaobo Xu;Guilei Wang;Huaxiang Yin;Chao Zhao","doi":"10.1109/LED.2025.3553826","DOIUrl":null,"url":null,"abstract":"The positive threshold voltage (VTH) tuning in InGaZnO (IGZO) thin-film transistors (TFTs) has become an urgent issue. In this work, the effect of different ultrathin gate dielectric interlayers (ILs) inserted between the high-<inline-formula> <tex-math>$\\kappa $ </tex-math></inline-formula> HfO2 and IGZO is investigated based on the pristine VTH of +0.064 V optimized by IGZO sputtering and post-annealing. By specifically combining varying HfO2 thicknesses and IL types, this initial VTH is linearly modulated to +0.528 V in IGZO devices without noticeable sub-threshold swing (SS) and mobility degradation. Attributed to the dipole and fixed charge modulation at the interface, the devices with 7-nm HfO2 and 2-nm SiO2 IL exhibit optimal results, including the most positive VTH, a decent mobility of 12 cm2/V<inline-formula> <tex-math>$\\cdot $ </tex-math></inline-formula>s, a well-maintained SS of 84.7 mV/dec, and promoted positive and negative bias stress (PBS/NBS) stability. This VTH modulation technique provides useful guidance for 3D integration such as IGZO 3D-DRAM with high performance.","PeriodicalId":13198,"journal":{"name":"IEEE Electron Device Letters","volume":"46 5","pages":"781-784"},"PeriodicalIF":4.1000,"publicationDate":"2025-03-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":null,"platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Electron Device Letters","FirstCategoryId":"5","ListUrlMain":"https://ieeexplore.ieee.org/document/10937168/","RegionNum":2,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"Q2","JCRName":"ENGINEERING, ELECTRICAL & ELECTRONIC","Score":null,"Total":0}
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Abstract

The positive threshold voltage (VTH) tuning in InGaZnO (IGZO) thin-film transistors (TFTs) has become an urgent issue. In this work, the effect of different ultrathin gate dielectric interlayers (ILs) inserted between the high- $\kappa $ HfO2 and IGZO is investigated based on the pristine VTH of +0.064 V optimized by IGZO sputtering and post-annealing. By specifically combining varying HfO2 thicknesses and IL types, this initial VTH is linearly modulated to +0.528 V in IGZO devices without noticeable sub-threshold swing (SS) and mobility degradation. Attributed to the dipole and fixed charge modulation at the interface, the devices with 7-nm HfO2 and 2-nm SiO2 IL exhibit optimal results, including the most positive VTH, a decent mobility of 12 cm2/V $\cdot $ s, a well-maintained SS of 84.7 mV/dec, and promoted positive and negative bias stress (PBS/NBS) stability. This VTH modulation technique provides useful guidance for 3D integration such as IGZO 3D-DRAM with high performance.
基于栅极介电堆工程的IGZO薄膜晶体管正阈值电压线性调谐
InGaZnO (IGZO)薄膜晶体管(TFTs)的正阈值电压(VTH)调谐已成为一个迫切需要解决的问题。本文在IGZO溅射和后退火优化的+0.064 V的原始VTH的基础上,研究了在高kappa HfO2和IGZO之间插入不同超薄栅极介电夹层(ILs)的影响。通过特别结合不同的HfO2厚度和IL类型,该初始VTH在IGZO器件中线性调制到+0.528 V,而没有明显的亚阈值摆动(SS)和迁移率下降。由于偶极子和界面处的固定电荷调制,7纳米HfO2和2纳米SiO2 IL的器件表现出最佳的效果,包括最积极的VTH,良好的迁移率为12 cm2/V $\cdot $ s,维持良好的SS为84.7 mV/dec,并提高了正负偏置应力(PBS/NBS)稳定性。这种VTH调制技术为高性能的IGZO 3D- dram等3D集成提供了有用的指导。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
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来源期刊
IEEE Electron Device Letters
IEEE Electron Device Letters 工程技术-工程:电子与电气
CiteScore
8.20
自引率
10.20%
发文量
551
审稿时长
1.4 months
期刊介绍: IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.
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