Fabrication and Characterization of Ga2O3 FinFETs on Patterned Silicon Substrate

Abstract

This study investigates the performance of thin film Ga₂O₃-based fin field-effect transistors (FinFETs) built on patterned silicon substrates. The Ga₂O₃ thin film is deposited using trimethylgallium (TMGa) ALD processes. Three devices are fabricated: one utilizing as-deposited thin film materials, another subjected to post-deposition annealing at 450°C, and a third annealed at 900°C. The electrical, optical, and material properties of the thin films and transistor devices are evaluated using a range of complementary characterization techniques, whilst the effects of post-deposition annealing at moderate (450°C) and higher temperature (900°C) are also investigated. The as-deposited device exhibited an Ion/Ioff ratio of 8.8 × 10⁶, an Ion density of 0.062 µA.µm⁻², a maximum charge carrier mobility of 3.2 cm2.V⁻¹s⁻¹, a threshold voltage (Vth) of 7.9 V, a sub-threshold swing (SS) of 590 mV.dec⁻¹, and a breakdown voltage (BVDSS) of 40 V. After annealing in N₂ atmosphere, the device annealed at 450°C displayed significant improvements, with an Ion/Ioff ratio of 8.3 × 107, Ion density of 0.14 µA.µm⁻², a maximum charge carrier mobility of 8.5 cm2.V⁻¹s⁻¹, Vth of 8.5 V, SS of 475 mV.dec⁻¹, and a remarkable BVDSS exceeding 200 V. In contrast, the 900°C annealed sample exhibited a decrease in performance, with an Ion/Ioff ratio of 1.2 × 107, Ion density of 0.023 µA.µm⁻², mobility dropping to 1.4 cm₂.V⁻¹s⁻¹, Vth of 9.2 V, and SS of 510 mV.dec⁻¹, although it maintained a breakdown voltage above 200 V. The surface morphology and materials compositions of the fabricated devices are further analyzed via a combination of scanning electron and transmission electron microscopy techniques. The obtained results confirmed a significant material transition from amorphous phase in as-deposited films into polycrystalline morphologies with noticeable grain boundaries for samples with thermal annealing.