A novel machine learning-driven optimization methodology for faster and more efficient design space exploration in high-level synthesis

Abstract

The optimization of digital circuits is a critical factor in determining the competitiveness of modern electronic systems, particularly in terms of area, performance, and power consumption. High-Level Synthesis (HLS) plays a pivotal role in this optimization process, enabling designers to define system requirements at a higher level of abstraction and providing opportunities to analyze and optimize digital circuits against various metrics prior to production. However, the design constraints inherent in the HLS process often lead to multi-objective optimization problems, which significantly complicate the exploration process. This complexity necessitates the development of novel synthesis methodologies enabling faster and more efficient design space exploration. In response to this need, within the scope of this study, we introduced an innovative and hybrid HLS methodology that combines metaheuristic and machine learning approaches. In this respect, two distinct synthesis tools were developed. The first tool, implemented in C++, utilizes the Simulated Annealing (SA) metaheuristic with a novel three-part solution representation. This representation, a key contribution of our study, aims to minimize the weighted sum of latency and area constraints for Data Flow Graph (DFG) designs. While effective, this approach resulted in extended execution times due to computationally intensive design variables. To address the performance bottleneck identified in the standard cost function evaluation, we developed a second tool that integrates machine learning with the traditional SA. This hybrid approach combines C++ and Python, incorporating a Support Vector Regression (SVR) model to estimate solution costs more efficiently, significantly reducing execution times. Our study also presents the detailed analyses of the experimental results conducted on seven benchmarks with varying node counts. The three-part solution representation in the traditional SA approach demonstrated up to a 53.38% improvement in performance compared to the single-part representation across all benchmarks. For benchmarks with fewer nodes (DiffEq, Lattice, Ellip, and FEWF), the model-based estimation implementation achieved results identical to the traditional approach but required longer execution times. For benchmarks characterized by higher node counts (MatMul, IntAux, and MCM), our novel approach demonstrated equivalent results to the traditional SA implementation with a time savings of up to 129 seconds. We leveraged these time savings to enhance the exploration process, achieving up to 5.4% improvement in solution quality without exceeding the execution time of the traditional approach.