Analog behavior of forksheet FET at high temperatures

IF 1.4 4区物理与天体物理 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

Solid-state Electronics Pub Date : 2025-04-22 DOI:10.1016/j.sse.2025.109139

Joao Antonio Martino , Paula Ghedini Der Agopian , Julius Andretti Peixoto Pires de Paula , Romain Ritzenthaler , Hans Mertens , Anabela Veloso , Naoto Horiguchi

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Abstract

This work presents an experimental study of the analog behavior of forksheet FET from room up to 150 °C with channel lengths of 26 and 70 nm. These devices present a Zero Temperature-Coefficient (ZTC) point for a gate voltage around 0,59 V (V_ZTC) in saturation region. The threshold voltage variation with temperature (dV_T/dT) is around −0,5mV/^oC due to the Fermi level decrease. The DIBL increases with temperature but it is kept lower than 51 mV/V in the studied temperature range. The transconductance and output conductance decrease (mainly due the mobility degradation) which results in a good intrinsic voltage gain of around 36 dB at room temperature, showing a slight change (±2dB) in the studied temperature range. The maximum unity gain frequency estimated for L = 26 nm is around 358 GHz in strong inversion regime. The results show that the forksheet FETs present a good performance for analog applications at high temperature, which in addition to the already known savings in footprint area compared to nanosheet technology, are potentially useful for future mixed-signal integrated circuits.

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高温下叉片场效应管的模拟行为

这项工作提出了一个实验研究的模拟行为的叉片场效应管从房间到150°C，通道长度为26和70纳米。这些器件在饱和区栅极电压约为0.59 V （VZTC）时呈现零温度系数（ZTC）点。由于费米能级的降低，阈值电压随温度的变化（dVT/dT）在−0,5 mv /oC左右。DIBL随温度升高而升高，但在研究温度范围内保持在51 mV/V以下。跨导和输出电导降低（主要是由于迁移率下降），导致室温下的固有电压增益约为36 dB，在研究的温度范围内略有变化（±2dB）。在强反转区，L = 26 nm的最大单位增益频率估计在358 GHz左右。结果表明，叉片fet在高温下的模拟应用中表现出良好的性能，除了已知的与纳米片技术相比节省的占地面积外，还可以用于未来的混合信号集成电路。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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来源期刊

Solid-state Electronics 物理-工程：电子与电气

CiteScore

3.00

自引率

5.90%

发文量

212

审稿时长

3 months

期刊介绍： It is the aim of this journal to bring together in one publication outstanding papers reporting new and original work in the following areas: (1) applications of solid-state physics and technology to electronics and optoelectronics, including theory and device design; (2) optical, electrical, morphological characterization techniques and parameter extraction of devices; (3) fabrication of semiconductor devices, and also device-related materials growth, measurement and evaluation; (4) the physics and modeling of submicron and nanoscale microelectronic and optoelectronic devices, including processing, measurement, and performance evaluation; (5) applications of numerical methods to the modeling and simulation of solid-state devices and processes; and (6) nanoscale electronic and optoelectronic devices, photovoltaics, sensors, and MEMS based on semiconductor and alternative electronic materials; (7) synthesis and electrooptical properties of materials for novel devices.