Reliability study and optimization of TSV interconnections with silicon interposer under random vibration

Abstract

As aerospace electronic devices continue to develop in the direction of miniaturization and high integration, 2.5D packaging technology has become a key breakthrough in aerospace chip research and development by virtue of its unique advantages. However, there is a lack of sufficient research on the reliability of 2.5D packaging in the severe vibration environment of the launch phase of the current space launch vehicle. Based on the finite element method, the reliability of the through silicon via (TSV) interconnect structure in the silicon interposer of 2.5D packaging under severe vibration environments is investigated, and the maximum stress of the micro-bumps, TSV-Cu, and C4 bumps at different locations are analyzed. It is found that the maximum stress of the micro-bumps and C4 bumps gradually decrease from the outside to the inside, and that the maximum stress of the TSV-Cu first decrease and then slightly increase. The fatigue life prediction of each part of the interconnect structure reveals that the micro-bumps are most likely to fail due to fatigue. To address this issue, a structural optimization design is carried out by using orthogonal tests with the micro-bump diameter, the micro-bump height, the thickness of the insulating layer, and the material of the bumps as the test factors for the micro-bumps’ maximum stress. The micro-bumps’ maximum stress are reduced by 36.3% after the optimization.