Degradation mode analysis of Cu bond wires on Cu plated SiC power semiconductors stressed by active power cycling

Abstract

Silicon carbide (SiC) is used as a new generation of power semiconductors to meet the increasing demands of modern electrified automotive powertrains. The state of the art involves Al-plated SiC semiconductors, which are bonded with Al bond wires. A known failure mode is the occurrence of cracks along the interface near the area between the Al bond foot and the Al metallization. In this study, an Al-free system with a fully copper-plated structure is used. The investigated SiC MOSFET is electroplated with $30\mu m$ Cu and contacted on top with $300\mu m$ Cu bond wires. The degradation mode of the copper bond wire as a topside contact for copper-plated SiC is to be analyzed, as limited results on the typical failure modes and mechanisms are available in the literature. The components are stressed in different configurations and measured by active power cycling tests. The investigations revealed different degradation modes depending on the degree of oxidation of the copper during the test. In the case of oxidation exclusion, the propagation and direction of cracks differ from the variant with strong oxidation. The experimental data of the oxidation-excluded variant are then analyzed using finite element simulation, focusing on the applied thermo-mechanical stress.