Substrate crosstalk characterization for optimized isolation in FDSOI

Abstract

The coupling (crosstalk) between devices through substrate is a limiting factor for the highly integrated mixed-mode and high frequency circuits. Silicon–On–Insulator (SOI) wafer with buried oxide (BOX) inherits better low frequency isolation compared to bulk silicon. However, at higher frequencies the advantage subsides due to capacitive coupling. For the mixed mode applications, the abrupt signal switching in digital circuitry poses a detrimental effect on the noise-sensitive analog circuitry. This work studies the crosstalk isolation in commercial SOI resistivity substrate (∼1–100 Ω.cm) by deploying design-based approaches for crosstalk reduction. A clear advantage of SOI vs standard bulk is reported especially for low-frequency range. Substrate well variance with different types of junctions is studied and demonstrated to reduce noise isolation. Moreover, a novel guard-ring scheme deploying the combination of resistive and capacitive elements has shown to have improvement in the noise isolation for wide band applications compared to the individual elements.