High Power Added Efficiency Enhancement-Mode Γ-Gate RF HEMT With High/Low p-GaN Doping Profile

IF 2 3区工程技术 Q3 ENGINEERING, ELECTRICAL & ELECTRONIC

IEEE Journal of the Electron Devices Society Pub Date : 2025-03-14 DOI:10.1109/JEDS.2025.3551313

Hsien-Chin Chiu;Chong-Rong Huang;Chia-Han Lin;Chia-Hao Yu;Hsuan-Ling Kao;Shinn-Yn Lin;Barry Lin

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引用次数: 0

Abstract

$0.5~\mu $

m enhancement-mode (E-mode) p-GaN

$\Gamma $

-gate RF HEMT with engineered Mg doping profile in p-GaN layer was studied for high power amplifier application. With high/low Mg doping profile design in p-GaN, the traditional Ti/p-GaN Schottky gate behavior can be transformed to ohmic-gate after 550°C 3 minutes post-gate annealing. The ohmic-gate design of p-GaN HEMT can minimize poole-frenkel (PF) emission thus the flicker noise and current collapse (C.C) can be improved. A better gate-to-channel modulation ability is also obtained due to precipitous C-VG curve of low Mg (

$1\times 10{^{{19}}}$

cm-3) doping concentration p-GaN layer. The fabricated device achieves a threshold voltage (VTH) of +1.1 V, and shows a low on-resistance (RON) of

$1.8~\Omega \cdot $

mm and an off-state breakdown voltage of 206 V. With the engineered Mg doping profile design, a 70% PAE is achieved together with an output power density of 1W/mm at VDS of 10V.

查看原文本刊更多论文

高功率附加效率增强模式Γ-Gate高/低p-GaN掺杂的RF HEMT

$0.5~\mu $ 研究了在p-GaN层中掺杂工程Mg谱线的m增强模式（e模式）p-GaN $\Gamma $门射频HEMT在高功率放大器中的应用。在p-GaN中采用高/低Mg掺杂设计，经过550℃3分钟的栅极退火后，传统的Ti/p-GaN肖特基栅极行为可以转变为欧姆栅极。p-GaN HEMT的欧姆栅极设计可以最大限度地减少池-峰峰（PF）发射，从而改善闪变噪声和电流崩溃（C.C）。由于低Mg （$1\times 10{^{{19}}}$ cm-3）掺杂浓度的p-GaN层具有陡峭的C-VG曲线，因此具有较好的门到通道调制能力。该器件的阈值电压（VTH）为+1.1 V，导通电阻（RON）低至$1.8~\Omega \cdot $ mm，断态击穿电压为206v。采用工程Mg掺杂剖面设计，70% PAE is achieved together with an output power density of 1W/mm at VDS of 10V.

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来源期刊

IEEE Journal of the Electron Devices Society Biochemistry, Genetics and Molecular Biology-Biotechnology

CiteScore

5.20

自引率

4.30%

发文量

124

审稿时长

9 weeks

期刊介绍： The IEEE Journal of the Electron Devices Society (J-EDS) is an open-access, fully electronic scientific journal publishing papers ranging from fundamental to applied research that are scientifically rigorous and relevant to electron devices. The J-EDS publishes original and significant contributions relating to the theory, modelling, design, performance, and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanodevices, optoelectronics, photovoltaics, power IC''s, and micro-sensors. Tutorial and review papers on these subjects are, also, published. And, occasionally special issues with a collection of papers on particular areas in more depth and breadth are, also, published. J-EDS publishes all papers that are judged to be technically valid and original.