Da Wang;Yong Liu;Longda Zhou;Yongkang Xue;Pengpeng Ren;Runsheng Wang;Zhigang Ji;Ru Huang
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引用次数: 0
Abstract
With the recent industrial adoption of a new low-power standby mode in the sub-word line drivers (SWD), we report a reliability challenge that occurs on p-type pitch transistor in sub-20-nm DRAM technology introduced by the GIDL-state degradation (GSD). It is observed that GSD can surpass the off-state degradation (OSD) stress mode. By separating different types of traps, we clarified the physical mechanism of GSD. Based on the understanding, a defect-based compact model is developed and validated, providing DRAM designers with a tool to find a balance between power consumption and long-term reliability.
期刊介绍:
IEEE Electron Device Letters publishes original and significant contributions relating to the theory, modeling, design, performance and reliability of electron and ion integrated circuit devices and interconnects, involving insulators, metals, organic materials, micro-plasmas, semiconductors, quantum-effect structures, vacuum devices, and emerging materials with applications in bioelectronics, biomedical electronics, computation, communications, displays, microelectromechanics, imaging, micro-actuators, nanoelectronics, optoelectronics, photovoltaics, power ICs and micro-sensors.